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  • 74LVC1G80GM,115

74LVC1G80GM,115

1.65V~5.5V 400MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G80 6 Pins 200μA 74LVC Series 6-XFDFN


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC1G80GM,115
  • Package: 6-XFDFN
  • Datasheet: PDF
  • Stock: 995
  • Description: 1.65V~5.5V 400MHz 1 Bit D-Type Flip Flop DUAL 74LVC1G80 6 Pins 200μA 74LVC Series 6-XFDFN(Kg)

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Details

Tags

Parameters
Factory Lead Time 13 Weeks
Contact Plating Tin
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 6-XFDFN
Number of Pins 6
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2010
Series 74LVC
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 6
Type D-Type
Technology CMOS
Voltage - Supply 1.65V~5.5V
Terminal Position DUAL
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number 74LVC1G80
Function Standard
Output Type Inverted
Polarity Inverting
Supply Voltage-Max (Vsup) 5.5V
Number of Circuits 1
Number of Bits 1
Clock Frequency 400MHz
Propagation Delay 2.5 ns
Quiescent Current 100nA
Turn On Delay Time 1.8 ns
Family LVC/LCX/Z
Current - Quiescent (Iq) 200μA
Current - Output High, Low 32mA 32mA
Max Propagation Delay @ V, Max CL 4.5ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 5pF
fmax-Min 200 MHz
Clock Edge Trigger Type Positive Edge
Height Seated (Max) 0.5mm
Radiation Hardening No
RoHS Status ROHS3 Compliant

74LVC1G80GM,115 Overview


The item is packaged in 6-XFDFNcases. Package Tape & Reel (TR)embeds it. T flip flop uses Invertedas the output. It is configured with a trigger that uses Positive Edge. Surface Mountis in the way of this electric part. With a supply voltage of 1.65V~5.5V volts, it operates. It is at -40°C~125°C TAdegrees Celsius that the system is operating. This D latch has the type D-Type. This type of FPGA is a part of the 74LVC series. In order for it to function properly, its output frequency should not exceed 400MHz. This process consumes 200μA quiescents. In 6terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 74LVC1G80 family contains it. Power is supplied from a voltage of 1.8V volts. The input capacitance of this JK flip flopis 5pF farads. Devices in the LVC/LCX/Zfamily are electronic devices. Surface Mount mounts this electronic component. As you can see from the design, it has pins with 6. This device exhibits a clock edge trigger type of Positive Edge. Flip flops designed with 1bits are used in this part. Vsup reaches 5.5V, the maximal supply voltage. Despite its superior flexibility, it relies on 1 circuits to achieve it. It consumes a total of 100nA quiescent current at any given time.

74LVC1G80GM,115 Features


Tape & Reel (TR) package
74LVC series
6 pins
1 Bits

74LVC1G80GM,115 Applications


There are a lot of Nexperia USA Inc. 74LVC1G80GM,115 Flip Flops applications.

  • Data storage
  • Common Clocks
  • Set-reset capability
  • Load Control
  • Storage registers
  • Pattern generators
  • Power down protection
  • Latch
  • Functionally equivalent to the MC10/100EL29
  • ATE