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74LVC2G74DC,125

1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC2G74 8 Pins 40μA 74LVC Series 8-VFSOP (0.091, 2.30mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC2G74DC,125
  • Package: 8-VFSOP (0.091, 2.30mm Width)
  • Datasheet: PDF
  • Stock: 230
  • Description: 1.65V~5.5V 200MHz 1 Bit D-Type Flip Flop DUAL 74LVC2G74 8 Pins 40μA 74LVC Series 8-VFSOP (0.091, 2.30mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-VFSOP (0.091, 2.30mm Width)
Number of Pins 8
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2010
Series 74LVC
JESD-609 Code e4
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Technology CMOS
Voltage - Supply 1.65V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Base Part Number 74LVC2G74
Function Set(Preset) and Reset
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5V
Number of Circuits 1
Number of Bits 1
Clock Frequency 200MHz
Propagation Delay 3.5 ns
Turn On Delay Time 2.5 ns
Family LVC/LCX/Z
Logic Function AND, D-Type
Current - Quiescent (Iq) 40μA
Current - Output High, Low 32mA 32mA
Max Propagation Delay @ V, Max CL 4.1ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
fmax-Min 200 MHz
Clock Edge Trigger Type Positive Edge
Length 2.3mm
Width 2mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

74LVC2G74DC,125 Overview


The package is in the form of 8-VFSOP (0.091, 2.30mm Width). Package Tape & Reel (TR)embeds it. As configured, the output uses Differential. The trigger it is configured with uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. Powered by a 1.65V~5.5Vvolt supply, it operates as follows. Temperature is set to -40°C~125°C TA. D-Typedescribes this flip flop. It belongs to the 74LVCseries of FPGAs. Its output frequency should not exceed 200MHz Hz. As a result, it consumes 40μA quiescent current. Terminations are 8. D latch belongs to the 74LVC2G74 family. A voltage of 1.8V is used to power it. The input capacitance of this T flip flop is 4pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It is a member of the LVC/LCX/Zfamily of D flip flop. A part of the electronic system is mounted in the way of Surface Mount. The 8pins are designed into the board. It has a clock edge trigger type of Positive Edge. An electronic part with 1bits has been designed. Vsup reaches 5.5V, the maximal supply voltage. Using 1 circuits, it is highly flexible.

74LVC2G74DC,125 Features


Tape & Reel (TR) package
74LVC series
8 pins
1 Bits

74LVC2G74DC,125 Applications


There are a lot of Nexperia USA Inc. 74LVC2G74DC,125 Flip Flops applications.

  • Digital electronics systems
  • Storage registers
  • ESD performance
  • Memory
  • Counters
  • ESD protection
  • Shift Registers
  • Balanced Propagation Delays
  • Single Down Count-Control Line
  • Instrumentation