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  • 74LVT574DB,112

74LVT574DB,112

2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVT574 190μA 74LVT Series 20-SSOP (0.209, 5.30mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LVT574DB,112
  • Package: 20-SSOP (0.209, 5.30mm Width)
  • Datasheet: PDF
  • Stock: 931
  • Description: 2.7V~3.6V 150MHz D-Type Flip Flop DUAL 74LVT574 190μA 74LVT Series 20-SSOP (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Additional Feature BROADSIDE VERSION OF 374
Subcategory FF/Latches
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVT574
JESD-30 Code R-PDSO-G20
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 2.7V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 150MHz
Family LVT
Current - Quiescent (Iq) 190μA
Output Characteristics 3-STATE
Current - Output High, Low 32mA 64mA
Output Polarity TRUE
Max I(ol) 0.064 A
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 5.9ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 5.9 ns
Trigger Type Positive Edge
Input Capacitance 4pF
Propagation Delay (tpd) 6.6 ns
Height Seated (Max) 2mm
Length 7.2mm
Width 5.3mm
RoHS Status ROHS3 Compliant
Mounting Type Surface Mount
Package / Case 20-SSOP (0.209, 5.30mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74LVT
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)

74LVT574DB,112 Overview


The flip flop is packaged in a case of 20-SSOP (0.209, 5.30mm Width). The package Tubecontains it. Currently, the output is configured to use Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. A supply voltage of 2.7V~3.6V is required for operation. Temperature is set to -40°C~85°C TA. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74LVTseries FPGA. In order for it to function properly, its output frequency should not exceed 150MHz. D latch consists of 1 elements. As a result, it consumes 190μA quiescent current and is not affected by external forces. A total of 20terminations have been recorded. Members of the 74LVT574family make up this object. Power is supplied from a voltage of 3V volts. There is 4pF input capacitance for this T flip flop. This D flip flop belongs to the family of LVT. There is a FF/Latchesbase part number assigned to the RS flip flops. It reaches 3.6Vwhen the supply voltage is maximal (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 2.7V. The power supply is 3.3V. A total of 2ports are embedded in the D flip flop. There is also a characteristic of BROADSIDE VERSION OF 374.

74LVT574DB,112 Features


Tube package
74LVT series
3.3V power supplies

74LVT574DB,112 Applications


There are a lot of NXP USA Inc. 74LVT574DB,112 Flip Flops applications.

  • Shift registers
  • Parallel data storage
  • Data transfer
  • Digital electronics systems
  • Control circuits
  • 2 – Bit synchronous counter
  • Load Control
  • EMI reduction circuitry
  • Divide a clock signal by 2 or 4
  • Latch