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EPM7128AEFC256-5

1mm PMIC 256 Pin 250MHz 3.3V FBGA


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7128AEFC256-5
  • Package: FBGA
  • Datasheet: PDF
  • Stock: 268
  • Description: 1mm PMIC 256 Pin 250MHz 3.3V FBGA (Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Mount Surface Mount
Package / Case FBGA
Number of Pins 256
Published 1998
JESD-609 Code e0
Pbfree Code no
Moisture Sensitivity Level (MSL) 3
Number of Terminations 256
ECCN Code 3A991
Terminal Finish Tin/Lead (Sn63Pb37)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 220
Supply Voltage 3.3V
Terminal Pitch 1mm
Frequency 250MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 256
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 100
Memory Type EEPROM
Propagation Delay 5 ns
Turn On Delay Time 5 ns
Frequency (Max) 192.3MHz
Programmable Logic Type EE PLD
Number of Gates 2500
Number of Programmable I/O 100
Number of Logic Blocks (LABs) 8
Speed Grade 5
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 2.1mm
Length 17mm
Width 17mm
RoHS Status RoHS Compliant

EPM7128AEFC256-5 Overview


In the mobile phone network, there are 128macro cells, which are cells with high-power antennas and towers.There is a FBGA package containing it.There are 100 I/Os on the board.The device is programmed with 256 terminations.This electrical part is wired with a terminal position of BOTTOM.It is powered from a supply voltage of 3.3V.The part is included in Programmable Logic Devices.The chip is programmed with 256 pins.When using this device, YEScan also be found.The 2500gates serve as building blocks for digital circuits.If high efficiency is to be achieved, the supply voltage should be maintained at [0].In general, it is recommended to store data in [0].A Surface Mountis mounted on this electronic component.The pins are [0].A maximum supply voltage of 3.6Vis used in its operation.A minimum supply voltage of 3V is required for this device to operate.There are 100 programmable I/Os in this system.This frequency is 250MHz.Operating temperatures should be higher than 0°C.A temperature less than 70°Cshould be used for operation.There are 8logic blocks (LABs) that make up its basic building block.It is recommended that the maximal frequency be lower than 192.3MHz.A programmable logic type is classified as EE PLD.

EPM7128AEFC256-5 Features


FBGA package
100 I/Os
256 pin count
256 pins
8 logic blocks (LABs)

EPM7128AEFC256-5 Applications


There are a lot of Altera EPM7128AEFC256-5 CPLDs applications.

  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • I/O expansion
  • TIMERS/COUNTERS
  • Cross-Matrix Switch
  • Multiple DIP Switch Replacement
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • Custom state machines
  • Configurable Addressing of I/O Boards
  • Multiple Clock Source Selection
  • Field programmable gate