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  • EPM7128AELC84-10N

EPM7128AELC84-10N

1.27mm PMIC 84 Pin 125MHz 3.3V PLCC


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7128AELC84-10N
  • Package: PLCC
  • Datasheet: PDF
  • Stock: 655
  • Description: 1.27mm PMIC 84 Pin 125MHz 3.3V PLCC (Kg)

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Details

Tags

Parameters
Mount Surface Mount
Package / Case PLCC
Number of Pins 84
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 84
ECCN Code 3A991
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form J BEND
Peak Reflow Temperature (Cel) 245
Supply Voltage 3.3V
Terminal Pitch 1.27mm
Frequency 125MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 84
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 2.3V
Number of I/O 68
Memory Type EEPROM
Propagation Delay 10 ns
Turn On Delay Time 10 ns
Frequency (Max) 192.3MHz
Programmable Logic Type EE PLD
Number of Gates 2500
Number of Programmable I/O 68
Number of Logic Blocks (LABs) 8
Speed Grade 10
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST YES
In-System Programmable YES
Length 29.3116mm
Width 29.3116mm
Radiation Hardening No
RoHS Status RoHS Compliant

EPM7128AELC84-10N Overview


There are 128 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).The item is packaged with PLCC.The device is programmed with 68 I/Os.It is programmed to terminate devices at [0].This electrical part has a terminal position of QUADand is connected to the ground.The power source is powered by 3.3Vvolts.It is a part of family [0].There are 84 pins on the chip.It is also possible to find YESwhen using this device.For digital circuits, there are 2500gates. These devices serve as building blocks.If high efficiency is to be achieved, the supply voltage should be maintained at [0].It is recommended to store data in [0].Surface Mountis the mounting point of this electronic part.There are 84 pins embedded in the device.With a maximum supply voltage of [0], it operates.The minimal supply voltage is 2.3V.There are 68 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. This can be achieved at a frequency of 125MHz.In order to operate properly, the operating temperature should be higher than 0°C.A temperature below 70°Cshould be used as the operating temperature.It consists of 8 logic blocks (LABs).A maximum frequency of less than 192.3MHzis recommended.There is a type of programmable logic called EE PLD.

EPM7128AELC84-10N Features


PLCC package
68 I/Os
84 pin count
84 pins
8 logic blocks (LABs)

EPM7128AELC84-10N Applications


There are a lot of Altera EPM7128AELC84-10N CPLDs applications.

  • Digital systems
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • DMA control
  • Boolean function generators
  • Synchronous or asynchronous mode
  • Software Configuration of Add-In Boards
  • Portable digital devices
  • Power automation
  • Interface bridging
  • Storage Cards and Storage Racks