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  • EPM7128SQC100-15

EPM7128SQC100-15

0.65mm PMIC 100 Pin 100MHz 5V PQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7128SQC100-15
  • Package: PQFP
  • Datasheet: PDF
  • Stock: 259
  • Description: 0.65mm PMIC 100 Pin 100MHz 5V PQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time 12 Weeks
Mount Surface Mount
Package / Case PQFP
Number of Pins 100
Packaging Bulk
Published 1998
JESD-609 Code e0
Pbfree Code no
Part Status Active
Moisture Sensitivity Level (MSL) 3
Number of Terminations 100
ECCN Code EAR99
Terminal Finish Tin/Lead (Sn/Pb)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 220
Supply Voltage 5V
Terminal Pitch 0.65mm
Frequency 100MHz
Time@Peak Reflow Temperature-Max (s) 30
Pin Count 100
Operating Supply Voltage 5V
Temperature Grade COMMERCIAL
Max Supply Voltage 5.25V
Min Supply Voltage 4.75V
Number of I/O 84
Memory Type EEPROM
Propagation Delay 15 ns
Turn On Delay Time 15 ns
Frequency (Max) 147.1MHz
Programmable Logic Type EE PLD
Number of Gates 2500
Number of Programmable I/O 84
Number of Logic Blocks (LABs) 8
Speed Grade 15
Output Function MACROCELL
Number of Macro Cells 128
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 3.65mm
Length 20mm
Width 14mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Contains Lead

EPM7128SQC100-15 Overview


The mobile phone network has 128 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).It is contained in package [0].It is equipped with 84I/O ports.There is a 100terminations set on devices.This electrical part has a terminal position of QUADand is connected to the ground.An electrical supply voltage of 5V is used to power it.It is a part of family [0].It is recommended that the chip be packaged by Bulk.The chip is programmed with 100 pins.It is also possible to find CONFIGURABLE I/O OPERATION WITH 3.3V OR 5Vwhen using this device.There are 2500 gates, which are devices that acts as a building block for digital circuits. The supply voltage should be maintained at 5V for high efficiency.It is recommended to store data in [0].In this case, Surface Mountis used to mount the electronic component.The 100pins are designed into the board.A maximum voltage of 5.25Vis required for operation.A minimum supply voltage of 4.75V is required for it to operate.There are 84 programmable I/Os in this system.The frequency that can be achieved is 100MHz.It is recommended that the operating temperature exceed 0°C.A temperature lower than 70°Cis recommended for operation.It consists of 8 logic blocks (LABs).It is recommended that the maximal frequency be lower than 147.1MHz.It is possible to classify programmable logic as EE PLD.

EPM7128SQC100-15 Features


PQFP package
84 I/Os
100 pin count
100 pins
8 logic blocks (LABs)

EPM7128SQC100-15 Applications


There are a lot of Altera EPM7128SQC100-15 CPLDs applications.

  • Power Meter SMPS
  • Programmable polarity
  • ToR/Aggregation/Core Switch and Router
  • Digital multiplexers
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • Address decoding
  • DMA control
  • Address decoders
  • High speed graphics processing
  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)