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EPM7192SQI160-10N
Purchase
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are any updates.
Shipping Cost
Shipping starts at $40, but some countries will exceed $40. For
example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The
basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and
country.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
Delivery TimeOnce the goods are shipped, estimated delivery time depends on the shipping methods you chose:
FedEx International, 5-7 business days.
The following are some common countries' logistic time.
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PQFP |
| Number of Pins | 160 |
| Published | 1998 |
| JESD-609 Code | e3 |
| Pbfree Code | yes |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 160 |
| ECCN Code | EAR99 |
| Terminal Finish | Matte Tin (Sn) |
| Max Operating Temperature | 85°C |
| Min Operating Temperature | -40°C |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | GULL WING |
| Peak Reflow Temperature (Cel) | 245 |
| Supply Voltage | 5V |
| Terminal Pitch | 0.65mm |
| Frequency | 125MHz |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 160 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 5V |
| Temperature Grade | INDUSTRIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 124 |
| Memory Type | EEPROM |
| Propagation Delay | 10 ns |
| Turn On Delay Time | 10 ns |
| Frequency (Max) | 125MHz |
| Programmable Logic Type | EE PLD |
| Number of Gates | 3750 |
| Number of Programmable I/O | 124 |
| Number of Logic Blocks (LABs) | 12 |
| Speed Grade | 10 |
| Output Function | MACROCELL |
| Number of Macro Cells | 192 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height | 3.4mm |
| Length | 28mm |
| Width | 28mm |
| REACH SVHC | Unknown |
| RoHS Status | RoHS Compliant |
| Lead Free | Lead Free |
EPM7192SQI160-10N Overview
192macrocells exist, which are cells in a mobile phone network that are primarily composed of high-power towers, antennas, or masts.A PQFP package contains the item.The device is programmed with 124 I/O ports.There are 160 terminations programmed into the device.QUADis the terminal position of this electrical part.Power is provided by a supply voltage of 5V volts.It is included in Programmable Logic Devices.There are 160 pins on the chip.In digital circuits, there are 3750gates, which act as a basic building block.A high level of efficiency can be achieved by maintaining the supply voltage at [0].In this case, EEPROMwill be used to store the data.Surface Mountis the mounting point of this electronic part.The device is designed with pins [0].This device operates at a voltage of 5.25Vas its maximum supply voltage.In order for it to operate, a supply voltage of 4.75Vis required.There are a total of 124 Programmable I/Os.It is possible to achieve a frequency of 125MHz.It is recommended that the operating temperature be greater than -40°C.It is recommended that the operating temperature be lower than 85°C.The system consists of 12 logic blocks (LABs).There should be a lower maximum frequency than 125MHz.This kind of FPGA is composed of EE PLD.
EPM7192SQI160-10N Features
PQFP package
124 I/Os
160 pin count
160 pins
12 logic blocks (LABs)
EPM7192SQI160-10N Applications
There are a lot of Altera EPM7192SQI160-10N CPLDs applications.
- Wide Vin Industrial low power SMPS
- SFP, QSFP, QSFP-DD, OSFP, Mini-SAS HD Port Management
- Multiple DIP Switch Replacement
- DDC INTERFACE
- Protection relays
- Software-driven hardware configuration
- Random logic replacement
- ON-CHIP OSCILLATOR CIRCUIT
- Address decoding
- Digital multiplexers