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  • EPM7256AEFC256-10N

EPM7256AEFC256-10N

1mm PMIC 256 Pin 172.4MHz 3.3V FBGA


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7256AEFC256-10N
  • Package: FBGA
  • Datasheet: PDF
  • Stock: 771
  • Description: 1mm PMIC 256 Pin 172.4MHz 3.3V FBGA (Kg)

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Details

Tags

Parameters
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case FBGA
Number of Pins 256
Published 1998
JESD-609 Code e1
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 256
ECCN Code 3A991
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 1mm
Frequency 172.4MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 256
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 164
Memory Type EEPROM
Propagation Delay 10 ns
Turn On Delay Time 10 ns
Frequency (Max) 172.4MHz
Programmable Logic Type EE PLD
Number of Gates 5000
Number of Programmable I/O 164
Number of Logic Blocks (LABs) 16
Speed Grade 10
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 2.1mm
Length 17mm
Width 17mm
REACH SVHC Unknown
RoHS Status RoHS Compliant
Lead Free Lead Free

EPM7256AEFC256-10N Overview


There are 256 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).The item is packaged with FBGA.There are 164 I/Os programmed in it.There are 256 terminations programmed into the device.This electrical component has a terminal position of 0.The device is powered by a voltage of 3.3V volts.It is a part of the family [0].A chip with 256pins is programmed.This device can also display [0].As a building block for digital circuits, there are 5000gates.Optimal efficiency requires a supply voltage of [0].In this case, EEPROMwill be used to store the data.In this case, Surface Mountis used to mount the electronic component.The 256pins are designed into the board.There is a maximum supply voltage of 3.6V.Normally, it operates with a voltage of 3VV as its minimum supply voltage.A total of 164 Programmable I/Os are available.In this case, 172.4MHzis the frequency that can be achieved.It is recommended that the operating temperature exceed 0°C.It is recommended that the operating temperature be lower than 70°C.There are 16 logic blocks (LABs) in its basic building block.Maximum frequency should be less than 172.4MHz.There are several types of programmable logic that can be categorized as EE PLD.

EPM7256AEFC256-10N Features


FBGA package
164 I/Os
256 pin count
256 pins
16 logic blocks (LABs)

EPM7256AEFC256-10N Applications


There are a lot of Altera EPM7256AEFC256-10N CPLDs applications.

  • SUPERVISORY FUNCTION (LVD AND WATCHDOG)
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • Address decoders
  • Parity generators
  • Pattern recognition
  • I/O PORTS (MCU MODULE)
  • STANDARD SERIAL INTERFACE UART
  • Auxiliary Power Supply Isolated and Non-isolated
  • Digital designs
  • Voltage level translation