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EPM7256AETC144-10N

0.5mm PMIC 144 Pin 172.4MHz 3.3V TQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7256AETC144-10N
  • Package: TQFP
  • Datasheet: PDF
  • Stock: 145
  • Description: 0.5mm PMIC 144 Pin 172.4MHz 3.3V TQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case TQFP
Number of Pins 144
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 144
Termination SMD/SMT
ECCN Code 3A991
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Frequency 172.4MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 144
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 120
Memory Type EEPROM
Propagation Delay 10 ns
Turn On Delay Time 10 ns
Frequency (Max) 172.4MHz
Programmable Logic Type EE PLD
Number of Gates 5000
Number of Programmable I/O 36
Number of Logic Blocks (LABs) 16
Speed Grade 10
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 1.6mm
Length 20mm
Width 20mm
Radiation Hardening No
REACH SVHC No SVHC
RoHS Status RoHS Compliant
Lead Free Lead Free

EPM7256AETC144-10N Overview


There are 256 macro cells in the network, which are high-power cell sites that provide radio coverage (tower, antenna, or mast) for a mobile phone network.It is contained in package [0].The device is programmed with 120 I/Os.The device is programmed with 144 terminations.Its terminal position is QUAD.The power supply voltage is 3.3V.It is a part of the family [0].There are 144 pins on the chip.This device is also capable of displaying [0].In digital circuits, there are 5000gates, which act as a basic building block.High efficiency requires a voltage supply of [0].EEPROM is adopted for storing data.This device is mounted by Surface Mount.The pins are [0].There is a maximum supply voltage of 3.6Vwhen the device is operating.With a minimal supply voltage of [0], it operates.There are 36 programmable I/Os, which are method of data transmissions, via input/output (I/O), between a central processing unit (CPU) and a peripheral device, such as a network adapter or a Parallel ATA storage device. This can be achieved at a frequency of 172.4MHz.Ideally, the operating temperature should be greater than 0°C.It is recommended to keep the operating temperature below 70°C.There are 16 logic blocks (LABs) in its basic building block.A maximum frequency of less than 172.4MHzis recommended.A programmable logic type can be categorized as EE PLD.

EPM7256AETC144-10N Features


TQFP package
120 I/Os
144 pin count
144 pins
16 logic blocks (LABs)

EPM7256AETC144-10N Applications


There are a lot of Altera EPM7256AETC144-10N CPLDs applications.

  • State machine control
  • Boolean function generators
  • STANDARD SERIAL INTERFACE UART
  • I2C BUS INTERFACE
  • Software-Driven Hardware Configuration
  • Storage Cards and Storage Racks
  • Interface bridging
  • Handheld digital devices
  • Reset swapping
  • Power automation