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  • EPM7256AETC144-7N

EPM7256AETC144-7N

0.5mm PMIC 144 Pin 90.9MHz 3.3V TQFP


  • Manufacturer: Altera
  • Origchip NO: 2936-EPM7256AETC144-7N
  • Package: TQFP
  • Datasheet: PDF
  • Stock: 199
  • Description: 0.5mm PMIC 144 Pin 90.9MHz 3.3V TQFP (Kg)

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Details

Tags

Parameters
Factory Lead Time 10 Weeks
Mount Surface Mount
Package / Case TQFP
Number of Pins 144
Published 1998
JESD-609 Code e3
Pbfree Code yes
Moisture Sensitivity Level (MSL) 3
Number of Terminations 144
Termination SMD/SMT
ECCN Code 3A991
Terminal Finish Matte Tin (Sn) - annealed
Max Operating Temperature 70°C
Min Operating Temperature 0°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Frequency 90.9MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 144
Qualification Status Not Qualified
Operating Supply Voltage 3.3V
Temperature Grade COMMERCIAL
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Number of I/O 120
Memory Type EEPROM
Propagation Delay 7.5 ns
Turn On Delay Time 7.5 ns
Frequency (Max) 172.4MHz
Programmable Logic Type EE PLD
Number of Gates 5000
Number of Programmable I/O 36
Number of Logic Blocks (LABs) 16
Speed Grade 7
Output Function MACROCELL
Number of Macro Cells 256
JTAG BST YES
In-System Programmable YES
Height Seated (Max) 1.6mm
Length 20mm
Width 20mm
REACH SVHC No SVHC
RoHS Status RoHS Compliant
Lead Free Lead Free

EPM7256AETC144-7N Overview


A mobile phone network consists of 256macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).The product is contained in a TQFP package.This device has 120 I/O ports programmed into it.It is programmed that device terminations will be 144 .There is a QUADterminal position on the electrical part in question.An electrical supply voltage of 3.3V is used to power it.It is a part of the family [0].A chip with 144pins is programmed.When using this device, YESis also available.In digital circuits, there are 5000gates, which act as a basic building block.In order to maintain high efficiency, the supply voltage should be maintained at [0].For storing data, it is recommended to use [0].It is mounted by Surface Mount.This board has 144 pins.With a maximum supply voltage of [0], it operates.The minimal supply voltage is 3V.Programmable I/Os are counted up 36.The frequency that can be achieved is 90.9MHz.Operating temperatures should be higher than 0°C.It is recommended that the operating temperature be below 70°C.There are 16 logic blocks (LABs) in its basic building block.The maximal frequency should be lower than 172.4MHz.There are several types of programmable logic that can be categorized as EE PLD.

EPM7256AETC144-7N Features


TQFP package
120 I/Os
144 pin count
144 pins
16 logic blocks (LABs)

EPM7256AETC144-7N Applications


There are a lot of Altera EPM7256AETC144-7N CPLDs applications.

  • Multiple DIP Switch Replacement
  • Bootloaders for FPGAs
  • Digital systems
  • Complex programmable logic devices
  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • Network Interface Card (NIC) and Host Bus Adapter (HBA)
  • White goods (Washing, Cold, Aircon ,...)
  • Software-driven hardware configuration
  • Discrete logic functions
  • D/T registers and latches