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MC100EL51DG

-4.2V~-5.7V 2.8GHz 1 Bit D-Type Flip Flop DUAL 100EL51 8 Pins 29mA 100EL Series 8-SOIC (0.154, 3.90mm Width)


  • Manufacturer: ON Semiconductor
  • Origchip NO: 598-MC100EL51DG
  • Package: 8-SOIC (0.154, 3.90mm Width)
  • Datasheet: PDF
  • Stock: 822
  • Description: -4.2V~-5.7V 2.8GHz 1 Bit D-Type Flip Flop DUAL 100EL51 8 Pins 29mA 100EL Series 8-SOIC (0.154, 3.90mm Width)(Kg)

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Details

Tags

Parameters
Packing Method RAIL
Technology ECL
Voltage - Supply -4.2V~-5.7V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Time@Peak Reflow Temperature-Max (s) 40
Base Part Number 100EL51
Function Reset
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.7V
Power Supplies -4.5V
Supply Voltage-Min (Vsup) 4.2V
Number of Circuits 1
Output Current 50mA
Number of Bits 1
Clock Frequency 2.8GHz
Propagation Delay 620 ps
Turn On Delay Time 475 ps
Logic Function Flip-Flop
Current - Quiescent (Iq) 29mA
Max Input Voltage 4.12V
Output Characteristics OPEN-EMITTER
Halogen Free Halogen Free
Prop. Delay@Nom-Sup 0.62 ns
Trigger Type Positive, Negative
High Level Output Current 50mA
Low Level Output Current 50mA
Power Supply Current-Max (ICC) 36mA
fmax-Min 2200 MHz
Clock Edge Trigger Type Positive Edge
Length 4.9mm
Width 3.9mm
Radiation Hardening No
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free
Factory Lead Time 4 Weeks
Lifecycle Status ACTIVE (Last Updated: 3 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-SOIC (0.154, 3.90mm Width)
Number of Pins 8
Operating Temperature -40°C~85°C TA
Packaging Tube
Published 2005
Series 100EL
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8
ECCN Code EAR99
Type D-Type
Terminal Finish Tin (Sn)
Additional Feature NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V
Subcategory FF/Latches

MC100EL51DG Overview


The item is packaged in 8-SOIC (0.154, 3.90mm Width)cases. D flip flop is embedded in the Tube package. T flip flop is configured with an output of Differential. It is configured with the trigger Positive, Negative. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of -4.2V~-5.7V volts. The operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 100ELseries FPGA. In order for it to function properly, its output frequency should not exceed 2.8GHz. T flip flop consumes 29mA quiescent energy. The number of terminations is 8. D latch belongs to the 100EL51 family. The power supply voltage is 5V. Electronic part Surface Mountis mounted in the way. It is designed with 8 pins. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. This part is included in FF/Latches. An electronic part designed with 1bits is used in this application. It reaches the maximum supply voltage (Vsup) at 5.7V. The supply voltage (Vsup) should be kept above 4.2V for normal operation. Using 1 circuits, it is highly flexible. Due to its reliability, this T flip flop is well suited for RAIL. A total of -4.5V power supplies are needed to run it. Its output current of 50mAallows for maximum design flexibility. Additionally, you may refer to the additional NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V of the electronic flip flop. 50mAis set as the high level output current. There is 50mA output current at the low level.

MC100EL51DG Features


Tube package
100EL series
8 pins
1 Bits
-4.5V power supplies

MC100EL51DG Applications


There are a lot of ON Semiconductor MC100EL51DG Flip Flops applications.

  • Power down protection
  • Asynchronous counter
  • Functionally equivalent to the MC10/100EL29
  • Shift registers
  • Load Control
  • Digital electronics systems
  • Pattern generators
  • Memory
  • Latch-up performance
  • Frequency Divider circuits