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  • SN74LV374ANSR

SN74LV374ANSR

2V~5.5V 170MHz 8 Bit D-Type Flip Flop DUAL 74LV374 20 Pins 74LV Series 20-SOIC (0.209, 5.30mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LV374ANSR
  • Package: 20-SOIC (0.209, 5.30mm Width)
  • Datasheet: -
  • Stock: 592
  • Description: 2V~5.5V 170MHz 8 Bit D-Type Flip Flop DUAL 74LV374 20 Pins 74LV Series 20-SOIC (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 2V
Number of Circuits 8
Load Capacitance 50pF
Number of Ports 2
Output Current 16mA
Number of Bits 8
Clock Frequency 170MHz
Propagation Delay 10.1 ns
Quiescent Current 20μA
Turn On Delay Time 4.9 ns
Family LV/LV-A/LVX/H
Logic Function D-Type, Flip-Flop
Output Characteristics 3-STATE
Current - Output High, Low 16mA 16mA
Max Propagation Delay @ V, Max CL 10.1ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 2.9pF
Number of Input Lines 2
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Translation N/A
Max Frequency@Nom-Sup 50000000Hz
Height 2mm
Length 12.6mm
Width 5.3mm
Thickness 1.95mm
RoHS Status ROHS3 Compliant
Lead Free Lead Free
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 3 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-SOIC (0.209, 5.30mm Width)
Number of Pins 20
Weight 266.712314mg
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74LV
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
ECCN Code EAR99
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Packing Method TR
Technology CMOS
Voltage - Supply 2V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 2.5V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74LV374

SN74LV374ANSR Overview


20-SOIC (0.209, 5.30mm Width)is the packaging method. It is contained within the Tape & Reel (TR)package. As configured, the output uses Tri-State, Non-Inverted. The trigger configured with it uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. With a supply voltage of 2V~5.5V volts, it operates. Currently, the operating temperature is -40°C~85°C TA. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 74LVseries FPGA. Its output frequency should not exceed 170MHz Hz. A total of 1elements are present in it. Terminations are 20. This D latch belongs to the family of 74LV374. An input voltage of 2.5Vpowers the D latch. There is 2.9pF input capacitance for this T flip flop. Devices in the LV/LV-A/LVX/Hfamily are electronic devices. Surface Mount mounts this electronic component. The 20pins are designed into the board. The clock edge trigger type for this device is Positive Edge. It is part of the FF/Latchesbase part number family. This flip flop is designed with 8 Bits. There is a 5.5Vmaximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be above 2V. In order to achieve its superior flexibility, 8 circuits are used. Considering the reliability of this T flip flop, it is well suited for TR. There are 3.3V power supplies attached to it. There are 2 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. With an output current of 16mA, this device offers maximum design flexibility. As of now, there are 2input lines. 20μAquiescent current consumed.

SN74LV374ANSR Features


Tape & Reel (TR) package
74LV series
20 pins
8 Bits
3.3V power supplies

SN74LV374ANSR Applications


There are a lot of Texas Instruments SN74LV374ANSR Flip Flops applications.

  • Digital electronics systems
  • Cold spare funcion
  • Common Clocks
  • QML qualified product
  • Data transfer
  • Buffered Clock
  • ESCC
  • Memory
  • Set-reset capability
  • Load Control