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  • SN74LVC112APW

SN74LVC112APW

1.65V~3.6V 150MHz JK Type Flip Flop DUAL 74LVC112 16 Pins 10μA 74LVC Series 16-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVC112APW
  • Package: 16-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 596
  • Description: 1.65V~3.6V 150MHz JK Type Flip Flop DUAL 74LVC112 16 Pins 10μA 74LVC Series 16-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 4 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 16-TSSOP (0.173, 4.40mm Width)
Number of Pins 16
Weight 61.887009mg
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74LVC
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
Type JK Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74LVC112
Function Set(Preset) and Reset
Qualification Status Not Qualified
Output Type Differential
Polarity Non-Inverting
Supply Voltage-Min (Vsup) 2V
Number of Circuits 2
Load Capacitance 50pF
Output Current 24mA
Clock Frequency 150MHz
Propagation Delay 7.1 ns
Turn On Delay Time 1 ns
Family LVC/LCX/Z
Logic Function AND, Flip-Flop, JK-Type
Current - Quiescent (Iq) 10μA
Current - Output High, Low 24mA 24mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 5.9ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 4.8 ns
Trigger Type Negative Edge
Input Capacitance 4.5pF
Schmitt Trigger No
Number of Input Lines 3
Clock Edge Trigger Type Negative Edge
Height 1.2mm
Length 5mm
Width 4.4mm
Thickness 1mm
REACH SVHC No SVHC
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74LVC112APW Overview


The flip flop is packaged in a case of 16-TSSOP (0.173, 4.40mm Width). The Tubepackage contains it. This output is configured with Differential. Negative Edgeis the trigger it is configured with. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~3.6V. -40°C~85°C TAis the operating temperature. This logic flip flop is classified as type JK Type. In terms of FPGAs, it belongs to the 74LVC series. You should not exceed 150MHzin the output frequency of the device. Despite external influences, it consumes 10μAof quiescent current. There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. It is a member of the 74LVC112 family. The power source is powered by 1.8V. This JK flip flop has a 4.5pFfarad input capacitance. Electronic devices of this type belong to the LVC/LCX/Zfamily. There is an electronic component mounted in the way of Surface Mount. 16pins are included in its design. This device exhibits a clock edge trigger type of Negative Edge. The part you are looking for is included in FF/Latches. The supply voltage (Vsup) should be maintained above 2V for normal operation. Its flexibility is enhanced by 2 circuits. With an output current of 24mA, it is possible to design the device in any way you want. A total of 3input lines have been provided.

SN74LVC112APW Features


Tube package
74LVC series
16 pins

SN74LVC112APW Applications


There are a lot of Texas Instruments SN74LVC112APW Flip Flops applications.

  • Computing
  • Data storage
  • ATE
  • Dynamic threshold performance
  • Consumer
  • Differential Individual
  • Frequency Dividers
  • Communications
  • Memory
  • Buffered Clock