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SN74LVC16374AZRDR

1.65V~3.6V 150MHz 16 Bit D-Type Flip Flop BOTTOM 74LVC16374 54 Pins 20μA 74LVC Series 54-TFBGA


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVC16374AZRDR
  • Package: 54-TFBGA
  • Datasheet: PDF
  • Stock: 943
  • Description: 1.65V~3.6V 150MHz 16 Bit D-Type Flip Flop BOTTOM 74LVC16374 54 Pins 20μA 74LVC Series 54-TFBGA(Kg)

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Details

Tags

Parameters
Lifecycle Status LIFEBUY (Last Updated: 2 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 54-TFBGA
Number of Pins 54
Operating Temperature -40°C~85°C TA
Packaging Cut Tape (CT)
Series 74LVC
JESD-609 Code e1
Pbfree Code yes
Part Status Last Time Buy
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 54
ECCN Code EAR99
Type D-Type
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
Subcategory FF/Latches
Packing Method TR
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74LVC16374
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 2
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Load Capacitance 50pF
Number of Ports 2
Output Current 24mA
Number of Bits 16
Clock Frequency 150MHz
Propagation Delay 4.9 ns
Turn On Delay Time 1.5 ns
Family LVC/LCX/Z
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 20μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 4.5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 4.5 ns
Trigger Type Positive Edge
Input Capacitance 5pF
Number of Input Lines 1
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Translation N/A
Height 1.2mm
Length 8mm
Width 5.5mm
Thickness 800μm
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74LVC16374AZRDR Overview


The flip flop is packaged in 54-TFBGA. The Cut Tape (CT)package contains it. T flip flop is configured with an output of Tri-State, Non-Inverted. This trigger uses the value Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1.65V~3.6V volts. It is operating at a temperature of -40°C~85°C TA. D-Typeis the type of this D latch. JK flip flop belongs to the 74LVCseries of FPGAs. Its output frequency should not exceed 150MHz Hz. The element count is 2 . As a result, it consumes 20μA quiescent current and is not affected by external forces. Terminations are 54. The 74LVC16374 family contains this object. It is powered from a supply voltage of 1.8V. The input capacitance of this T flip flop is 5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. LVC/LCX/Zis the family of this D flip flop. In this case, the electronic component is mounted in the way of Surface Mount. A total of 54pins are provided on this board. This device has Positive Edgeas its clock edge trigger type. This part is included in FF/Latches. An electronic part with 16bits has been designed. It reaches the maximum supply voltage (Vsup) at 3.6V. As a result of its reliability, this D flip flop is ideally suited for TR. The D latch runs on a voltage of 3.3V volts. A D flip flop with 2embedded ports is available. With an output current of 24mA, this device offers maximum design flexibility. 1input lines are available for you to choose from.

SN74LVC16374AZRDR Features


Cut Tape (CT) package
74LVC series
54 pins
16 Bits
3.3V power supplies

SN74LVC16374AZRDR Applications


There are a lot of Texas Instruments SN74LVC16374AZRDR Flip Flops applications.

  • Load Control
  • Latch-up performance
  • Memory
  • Instrumentation
  • Latch
  • ESD protection
  • Balanced 24 mA output drivers
  • Counters
  • Buffered Clock
  • ESD performance