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SN74LVC16374DLR

2.7V~3.6V 100MHz 16 Bit D-Type Flip Flop DUAL 74LVC16374 48 Pins 40μA 74LVC Series 48-BSSOP (0.295, 7.50mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVC16374DLR
  • Package: 48-BSSOP (0.295, 7.50mm Width)
  • Datasheet: -
  • Stock: 506
  • Description: 2.7V~3.6V 100MHz 16 Bit D-Type Flip Flop DUAL 74LVC16374 48 Pins 40μA 74LVC Series 48-BSSOP (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 4 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 48-BSSOP (0.295, 7.50mm Width)
Number of Pins 48
Weight 600.301152mg
Operating Temperature -40°C~85°C TA
Packaging Cut Tape (CT)
Series 74LVC
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 48
ECCN Code EAR99
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Packing Method TR
Technology CMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.635mm
Base Part Number 74LVC16374
Function Standard
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 3.3V
Number of Elements 2
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Load Capacitance 50pF
Number of Ports 2
Output Current 24mA
Number of Bits 16
Clock Frequency 100MHz
Propagation Delay 8.5 ns
Turn On Delay Time 1.5 ns
Family LVC/LCX/Z
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 40μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 7.5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 7.5 ns
Trigger Type Positive Edge
Input Capacitance 3.5pF
Power Supply Current-Max (ICC) 0.04mA
Number of Output Lines 1
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Translation N/A
Height 2.79mm
Length 15.88mm
Width 7.49mm
Thickness 2.59mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74LVC16374DLR Overview


The package is in the form of 48-BSSOP (0.295, 7.50mm Width). It is contained within the Cut Tape (CT)package. T flip flop uses Tri-State, Non-Invertedas the output. It is configured with a trigger that uses Positive Edge. There is an electric part mounted in the way of Surface Mount. The JK flip flop operates at 2.7V~3.6Vvolts. A temperature of -40°C~85°C TAis considered to be the operating temperature. D-Typedescribes this flip flop. The 74LVCseries comprises this type of FPGA. It should not exceed 100MHzin terms of its output frequency. In total, there are 2 elements. There is a consumption of 40μAof quiescent energy. Currently, there are 48 terminations. JK flip flop belongs to 74LVC16374 family. It is powered by a voltage of 3.3V . Its input capacitance is 3.5pFfarads. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. There is an electronic part that is mounted in the way of Surface Mount. This board has 48 pins. Edge triggering is a type of triggering that allows a circuit to become active at the positive edge or the negative edge of the clock signal. The clock edge trigger type of this device is Positive Edge. The RS flip flops belongs to FF/Latches base part number. The flip flop is designed with 16bits. The maximal supply voltage (Vsup) reaches 3.6V. As a result of its reliability, this D flip flop is ideally suited for TR. The D flip flop is embedded with 2ports. For high efficiency, the supply voltage should be kept at 3.3V. This T flip flop features a maximum design flexibility due to its output current of 24mA. In order for the chip to function, it has 1output lines.

SN74LVC16374DLR Features


Cut Tape (CT) package
74LVC series
48 pins
16 Bits

SN74LVC16374DLR Applications


There are a lot of Texas Instruments SN74LVC16374DLR Flip Flops applications.

  • Pattern generators
  • Modulo – n – counter
  • Digital electronics systems
  • CMOS Process
  • Instrumentation
  • Storage registers
  • Communications
  • Test & Measurement
  • Data transfer
  • Circuit Design