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  • SN74LVTH574PW

SN74LVTH574PW

2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop DUAL 74LVTH574 20 Pins 190μA 74LVTH Series 20-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Texas Instruments
  • Origchip NO: 815-SN74LVTH574PW
  • Package: 20-TSSOP (0.173, 4.40mm Width)
  • Datasheet: -
  • Stock: 386
  • Description: 2.7V~3.6V 150MHz 8 Bit D-Type Flip Flop DUAL 74LVTH574 20 Pins 190μA 74LVTH Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 6 Weeks
Lifecycle Status ACTIVE (Last Updated: 2 days ago)
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-TSSOP (0.173, 4.40mm Width)
Number of Pins 20
Weight 76.997305mg
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74LVTH
JESD-609 Code e4
Pbfree Code yes
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
ECCN Code EAR99
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory Bus Driver/Transceiver
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Base Part Number 74LVTH574
Function Standard
Output Type Tri-State, Non-Inverted
Operating Supply Voltage 3.3V
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Min (Vsup) 2.7V
Number of Circuits 8
Load Capacitance 50pF
Number of Ports 2
Output Current 64mA
Number of Bits 8
Clock Frequency 150MHz
Propagation Delay 5.9 ns
Turn On Delay Time 3 ns
Family LVT
Logic Function D-Type, Flip-Flop
Current - Quiescent (Iq) 190μA
Current - Output High, Low 32mA 64mA
Max I(ol) 0.064 A
Max Propagation Delay @ V, Max CL 4.5ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 4.5 ns
Trigger Type Positive Edge
Input Capacitance 3pF
Power Supply Current-Max (ICC) 5mA
Number of Output Lines 3
Count Direction UNIDIRECTIONAL
Clock Edge Trigger Type Positive Edge
Height 1.2mm
Length 6.5mm
Width 4.4mm
Thickness 1mm
Radiation Hardening No
RoHS Status ROHS3 Compliant
Lead Free Lead Free

SN74LVTH574PW Overview


As a result, it is packaged as 20-TSSOP (0.173, 4.40mm Width). It is included in the package Tube. As configured, the output uses Tri-State, Non-Inverted. The trigger it is configured with uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 2.7V~3.6V volts. The operating temperature is -40°C~85°C TA. The type of this D latch is D-Type. In this case, it is a type of FPGA belonging to the 74LVTH series. In order for it to function properly, its output frequency should not exceed 150MHz. In total, it contains 1 elements. As a result, it consumes 190μA of quiescent current without being affected by external factors. There are 20 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. It is a member of the 74LVTH574 family. A voltage of 3.3V provides power to the D latch. Its input capacitance is 3pF farads. The electronic device belongs to the LVTfamily. The electronic part is mounted in the way of Surface Mount. This board has 20 pins. This device's clock edge trigger type is Positive Edge. This part is included in Bus Driver/Transceiver. Flip flops designed with 8bits are used in this part. For normal operation, the supply voltage (Vsup) should be kept above 2.7V. Its superior flexibility is attributed to its use of 8 circuits. The flip flop contains 2ports. In order to achieve high efficiency, the supply voltage should be maintained at 3.3V. Its output current of 64mAallows for maximum design flexibility. In order to operate, the chip has 3 output lines.

SN74LVTH574PW Features


Tube package
74LVTH series
20 pins
8 Bits

SN74LVTH574PW Applications


There are a lot of Texas Instruments SN74LVTH574PW Flip Flops applications.

  • Latch-up performance
  • Synchronous counter
  • CMOS Process
  • Single Up Count-Control Line
  • Latch
  • ATE
  • Common Clocks
  • Bounce elimination switch
  • Memory
  • High Performance Logic for test systems