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74LV174PW,118

1V~5.5V 100MHz D-Type Flip Flop DUAL 74LV174 160μA 74LV Series 16-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LV174PW,118
  • Package: 16-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 244
  • Description: 1V~5.5V 100MHz D-Type Flip Flop DUAL 74LV174 160μA 74LV Series 16-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 16-TSSOP (0.173, 4.40mm Width)
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 1998
Series 74LV
JESD-609 Code e4
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 1V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV174
Function Master Reset
Qualification Status Not Qualified
Output Type Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 1V
Load Capacitance 50pF
Clock Frequency 100MHz
Family LV/LV-A/LVX/H
Current - Quiescent (Iq) 160μA
Current - Output High, Low 12mA 12mA
Output Polarity TRUE
Number of Bits per Element 6
Max Propagation Delay @ V, Max CL 21ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 3.5pF
fmax-Min 20 MHz
Max Frequency@Nom-Sup 20000000Hz
Height Seated (Max) 2mm
Width 5.3mm
RoHS Status ROHS3 Compliant

74LV174PW,118 Overview


16-TSSOP (0.173, 4.40mm Width)is the packaging method. The package Tape & Reel (TR)contains it. It is configured with Non-Invertedas an output. Positive Edgeis the trigger it is configured with. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1V~5.5V. It is operating at -40°C~125°C TA. This logic flip flop is classified as type D-Type. In this case, it is a type of FPGA belonging to the 74LV series. There should be no greater frequency than 100MHzon its output. D latch consists of 1 elements. During its operation, it consumes 160μA quiescent energy. There are 16 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. JK flip flop belongs to 74LV174 family. An input voltage of 3.3Vpowers the D latch. This JK flip flop has a 3.5pFfarad input capacitance. In terms of electronic devices, this device belongs to the LV/LV-A/LVX/Hfamily of devices. The RS flip flops belongs to FF/Latches base part number. In this case, the maximum supply voltage (Vsup) reaches 5.5V. The supply voltage (Vsup) should be maintained above 1V for normal operation. Compared to other similar T flip flops, this device offers reliable performance and is well suited for TAPE AND REEL. The D latch runs on a voltage of 3.3V volts.

74LV174PW,118 Features


Tape & Reel (TR) package
74LV series
3.3V power supplies

74LV174PW,118 Applications


There are a lot of NXP USA Inc. 74LV174PW,118 Flip Flops applications.

  • Test & Measurement
  • Safety Clamp
  • Latch
  • Frequency Divider circuits
  • 2 – Bit synchronous counter
  • Guaranteed simultaneous switching noise level
  • Synchronous counter
  • Divide a clock signal by 2 or 4
  • Shift registers
  • Memory