74LVC1G79GF,132

74LVC1G79GF,132 Overview

The flip flop is packaged in 6-XFDFN. There is an embedded version in the package Tape & Reel (TR). As configured, the output uses Non-Inverted. The trigger it is configured with uses Positive Edge. The electronic part is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 1.65V~5.5V. A temperature of -40°C~125°C TAis considered to be the operating temperature. The type of this D latch is D-Type. JK flip flop is a part of the 74LVCseries of FPGAs. It should not exceed 500MHzin terms of its output frequency. Despite external influences, it consumes 500μAof quiescent current. Terminations are 6. The 74LVC1G79family includes it. A voltage of 1.8V provides power to the D latch. Its input capacitance is 5pF farads. In terms of electronic devices, this device belongs to the LVC/LCX/Zfamily of devices. The electronic part is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 6. This device has Positive Edgeas its clock edge trigger type. The design is based on 1bits. Its superior flexibility is attributed to its use of 1 circuits. In terms of quiescent current, it consumes 100nA .

74LVC1G79GF,132 Features

Tape & Reel (TR) package
74LVC series
6 pins
1 Bits

74LVC1G79GF,132 Applications

There are a lot of Nexperia USA Inc. 74LVC1G79GF,132 Flip Flops applications.

• Set-reset capability
• CMOS Process
• Frequency division
• Memory
• Data Synchronizers
• Latch
• Safety Clamp
• Modulo – n – counter
• ESD performance
• ESCC