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  • 74LVC374APW-Q100J

74LVC374APW-Q100J

1.65V~3.6V 150MHz D-Type Flip Flop DUAL 74LVC374 20 Pins 10μA 74LVC Series 20-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74LVC374APW-Q100J
  • Package: 20-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 705
  • Description: 1.65V~3.6V 150MHz D-Type Flip Flop DUAL 74LVC374 20 Pins 10μA 74LVC Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 4 Weeks
Mounting Type Surface Mount
Package / Case 20-TSSOP (0.173, 4.40mm Width)
Surface Mount YES
Number of Pins 20
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Series 74LVC
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Base Part Number 74LVC374
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 3.6V
Number of Ports 2
Clock Frequency 150MHz
Family LVC/LCX/Z
Current - Quiescent (Iq) 10μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 7ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
Length 6.5mm
Width 4.4mm
Radiation Hardening No
RoHS Status ROHS3 Compliant

74LVC374APW-Q100J Overview


The item is packaged in 20-TSSOP (0.173, 4.40mm Width)cases. D flip flop is included in the Tape & Reel (TR)package. T flip flop is configured with an output of Tri-State, Non-Inverted. Positive Edgeis the trigger it is configured with. There is an electronic component mounted in the way of Surface Mount. A voltage of 1.65V~3.6Vis used as the supply voltage. In this case, the operating temperature is -40°C~125°C TA. A flip flop of this type is classified as a D-Type. JK flip flop belongs to the 74LVCseries of FPGAs. It should not exceed 150MHzin terms of its output frequency. The element count is 1 . This process consumes 10μA quiescents. 20terminations have occurred. The 74LVC374 family contains it. A voltage of 3.3V is used to power it. JK flip flop input capacitance is 4pF farads. It is a member of the LVC/LCX/Zfamily of D flip flop. With its 20pins, it is designed to work with most electronic flip flops. As soon as 3.6Vis reached, Vsup reaches its maximum value. The D flip flop is embedded with 2ports.

74LVC374APW-Q100J Features


Tape & Reel (TR) package
74LVC series
20 pins

74LVC374APW-Q100J Applications


There are a lot of Nexperia USA Inc. 74LVC374APW-Q100J Flip Flops applications.

  • Bus hold
  • Event Detectors
  • Divide a clock signal by 2 or 4
  • Patented noise
  • Modulo – n – counter
  • EMI reduction circuitry
  • Counters
  • Individual Asynchronous Resets
  • Storage registers
  • Circuit Design