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  • 74LVT74PW,118

74LVT74PW,118

2.7V~3.6V 345MHz D-Type Flip Flop DUAL 74LVT74 1mA 74LVT Series 14-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LVT74PW,118
  • Package: 14-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 313
  • Description: 2.7V~3.6V 345MHz D-Type Flip Flop DUAL 74LVT74 1mA 74LVT Series 14-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 14-TSSOP (0.173, 4.40mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74LVT
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 14
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology BICMOS
Voltage - Supply 2.7V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LVT74
Function Set(Preset) and Reset
Qualification Status Not Qualified
Output Type Differential
Number of Elements 2
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Load Capacitance 50pF
Clock Frequency 345MHz
Family LVT
Current - Quiescent (Iq) 1mA
Current - Output High, Low 20mA 32mA
Output Polarity COMPLEMENTARY
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 3.6ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 5 ns
Trigger Type Positive Edge
Input Capacitance 3pF
Propagation Delay (tpd) 5 ns
Length 5mm
Width 4.4mm
RoHS Status ROHS3 Compliant

74LVT74PW,118 Overview


The flip flop is packaged in a case of 14-TSSOP (0.173, 4.40mm Width). D flip flop is embedded in the Tape & Reel (TR) package. Differentialis the output configured for it. JK flip flop uses Positive Edgeas the trigger. In this case, the electronic component is mounted in the way of Surface Mount. The supply voltage is set to 2.7V~3.6V. -40°C~85°C TAis the operating temperature. D-Typeis the type of this D latch. In FPGA terms, D flip flop is a type of 74LVTseries FPGA. It should not exceed 345MHzin its output frequency. A total of 2 elements are present. Despite external influences, it consumes 1mAof quiescent current. The number of terminations is 14. JK flip flop belongs to 74LVT74 family. An input voltage of 3.3Vpowers the D latch. This T flip flop has a capacitance of 3pF farads at the input. The electronic device belongs to the LVTfamily. There is a base part number FF/Latchesfor the RS flip flops. In this case, the maximum supply voltage (Vsup) reaches 3.6V. Due to its reliability, this T flip flop is well suited for TAPE AND REEL. A total of 3.3V power supplies are needed to run it.

74LVT74PW,118 Features


Tape & Reel (TR) package
74LVT series
3.3V power supplies

74LVT74PW,118 Applications


There are a lot of NXP USA Inc. 74LVT74PW,118 Flip Flops applications.

  • Circuit Design
  • Automotive
  • EMI reduction circuitry
  • Balanced 24 mA output drivers
  • Data transfer
  • Common Clocks
  • Asynchronous counter
  • Latch
  • Single Down Count-Control Line
  • Computers