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74VHCT574AFT

4.5V~5.5V 140MHz D-Type Flip Flop DUAL 4μA 74VHCT Series 20-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Toshiba Semiconductor and Storage
  • Origchip NO: 830-74VHCT574AFT
  • Package: 20-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 384
  • Description: 4.5V~5.5V 140MHz D-Type Flip Flop DUAL 4μA 74VHCT Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 12 Weeks
Mounting Type Surface Mount
Package / Case 20-TSSOP (0.173, 4.40mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Published 2016
Series 74VHCT
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Technology CMOS
Voltage - Supply 4.5V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 5V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
JESD-30 Code R-PDSO-G20
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Supply Voltage-Min (Vsup) 4.5V
Number of Ports 2
Clock Frequency 140MHz
Family AHCT/VHCT/VT
Current - Quiescent (Iq) 4μA
Output Characteristics 3-STATE
Current - Output High, Low 8mA 8mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 10.4ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF
Length 6.5mm
Width 4.4mm
RoHS Status RoHS Compliant

74VHCT574AFT Overview


The package is in the form of 20-TSSOP (0.173, 4.40mm Width). The Tape & Reel (TR)package contains it. T flip flop uses Tri-State, Non-Invertedas its output configuration. There is a trigger configured with Positive Edge. Surface Mountmounts this electrical part. A voltage of 4.5V~5.5Vis used as the supply voltage. A temperature of -40°C~85°C TAis considered to be the operating temperature. D-Typeis the type of this D latch. This type of FPGA is a part of the 74VHCT series. A frequency of 140MHzshould be the maximum output frequency. A total of 1elements are contained within it. During its operation, it consumes 4μA quiescent energy. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. A voltage of 5V is used as the power supply for this D latch. There is 4pF input capacitance for this T flip flop. AHCT/VHCT/VTis the family of this D flip flop. It reaches 5.5Vwhen the supply voltage is maximal (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 4.5V. The flip flop has 2embedded ports.

74VHCT574AFT Features


Tape & Reel (TR) package
74VHCT series

74VHCT574AFT Applications


There are a lot of Toshiba Semiconductor and Storage 74VHCT574AFT Flip Flops applications.

  • Single Up Count-Control Line
  • EMI reduction circuitry
  • Power down protection
  • High Performance Logic for test systems
  • Load Control
  • Guaranteed simultaneous switching noise level
  • Cold spare funcion
  • Circuit Design
  • Communications
  • Computing