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EPM7256AQC208-12

2.5/3.33.3V 0.5mm PMIC 3.3V PQFP

Manufacturer: Altera
Origchip NO: 2936-EPM7256AQC208-12
Package: PQFP
Datasheet: -
Stock: 803
Description: 2.5/3.33.3V 0.5mm PMIC 3.3V PQFP (Kg)

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Details

Tags

Parameters
Package / Case	PQFP
Surface Mount	YES
JESD-609 Code	e0
Pbfree Code	no
Moisture Sensitivity Level (MSL)	3
Number of Terminations	208
ECCN Code	3A991
Terminal Finish	Tin/Lead (Sn/Pb)
Additional Feature	YES
HTS Code	8542.39.00.01
Subcategory	Programmable Logic Devices
Technology	CMOS
Terminal Position	QUAD
Terminal Form	GULL WING
Peak Reflow Temperature (Cel)	220
Supply Voltage	3.3V
Terminal Pitch	0.5mm
Time@Peak Reflow Temperature-Max (s)	30
Pin Count	208
Qualification Status	Not Qualified
Operating Temperature (Max)	70°C
Supply Voltage-Max (Vsup)	3.6V
Power Supplies	2.5/3.33.3V
Temperature Grade	COMMERCIAL
Supply Voltage-Min (Vsup)	3V
Number of I/O	164
Clock Frequency	78.1MHz
Propagation Delay	12 ns
Programmable Logic Type	EE PLD
Number of Gates	5000
Number of Logic Blocks (LABs)	16
Output Function	MACROCELL
Number of Macro Cells	256
JTAG BST	YES
In-System Programmable	YES
Height Seated (Max)	4.1mm
Length	28mm
Width	28mm
RoHS Status	Non-RoHS Compliant

EPM7256AQC208-12 Overview

The mobile phone network has 256 macro cells, which are cells that provide radio coverage from high-power cell sites (towers, antennas, or masts).It is part of the PQFP package.It is programmed with 164 I/Os.There are 208 terminations programmed into the device.Its terminal position is QUAD.The power supply voltage is 3.3V.The part is included in Programmable Logic Devices.A chip with 208pins is programmed.If this device is used, you will also be able to find [0].For digital circuits, there are 5000gates. These devices serve as building blocks.It runs on 2.5/3.33.3Vvolts of power.Supply voltage (Vsup) reaches a maximum of 3.6V.The logic block consists of 16 l logic blocks (LABs).A supply voltage (Vsup) of greater than 3V should be used.The clock frequency should not exceed 78.1MHz.In programmable logic, a type of logic can be categorized as EE PLD.The operating temperature should be kept below 70°C.

EPM7256AQC208-12 Features

PQFP package
164 I/Os
208 pin count
2.5/3.33.3V power supplies
16 logic blocks (LABs)

EPM7256AQC208-12 Applications

There are a lot of Altera EPM7256AQC208-12 CPLDs applications.

ANALOG-TO-DIGITAL CONVERTOR (ADC)
Complex programmable logic devices
Cross-Matrix Switch
Reset swapping
Random logic replacement
Preset swapping
Custom shift registers
Discrete logic functions
ToR/Aggregation/Core Switch and Router
Voltage level translation