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EPM9320ALC84-10
Purchase
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Shipping Cost
Shipping starts at $40, but some countries will exceed $40. For
example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The
basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and
country.
Currently, our products are shipped through DHL, FedEx, SF, and UPS.
Delivery TimeOnce the goods are shipped, estimated delivery time depends on the shipping methods you chose:
FedEx International, 5-7 business days.
The following are some common countries' logistic time.
| Parameters | |
|---|---|
| Mount | Surface Mount |
| Package / Case | PLCC |
| Number of Pins | 84 |
| Published | 1994 |
| JESD-609 Code | e0 |
| Pbfree Code | no |
| Part Status | Discontinued |
| Moisture Sensitivity Level (MSL) | 3 |
| Number of Terminations | 84 |
| Terminal Finish | Tin/Lead (Sn/Pb) |
| Max Operating Temperature | 70°C |
| Min Operating Temperature | 0°C |
| HTS Code | 8542.39.00.01 |
| Subcategory | Programmable Logic Devices |
| Technology | CMOS |
| Terminal Position | QUAD |
| Terminal Form | J BEND |
| Peak Reflow Temperature (Cel) | 220 |
| Supply Voltage | 5V |
| Terminal Pitch | 1.27mm |
| Time@Peak Reflow Temperature-Max (s) | 30 |
| Pin Count | 84 |
| Qualification Status | Not Qualified |
| Operating Supply Voltage | 5V |
| Temperature Grade | COMMERCIAL |
| Max Supply Voltage | 5.25V |
| Min Supply Voltage | 4.75V |
| Number of I/O | 60 |
| Memory Type | EEPROM |
| Clock Frequency | 144.9MHz |
| Propagation Delay | 10.8 ns |
| Programmable Logic Type | EE PLD |
| Number of Gates | 6000 |
| Number of Logic Blocks (LABs) | 20 |
| Output Function | MACROCELL |
| Number of Macro Cells | 320 |
| JTAG BST | YES |
| In-System Programmable | YES |
| Height | 3.81mm |
| Length | 29.31mm |
| Width | 29.31mm |
| RoHS Status | RoHS Compliant |
EPM9320ALC84-10 Overview
320 macrocells are present in the mobile phone network, which offer radio coverage from a high-power cell tower, antenna, or mast.There is a PLCC package containing it.In this case, there are 60 I/Os programmed.There are 84 terminations programmed into the device.This electrical part has a terminal position of QUADand is connected to the ground.The device is powered by a voltage of 5V volts.This part is in the family [0].There are 84 pins on the chip.A digital circuit can be constructed using 6000gates.In order to maintain high efficiency, the supply voltage should be maintained at [0].EEPROM is adopted for storing data.Surface Mountis used to mount this electronic component.There are 84pins on it.It operates with the maximal supply voltage of 5.25V.It is powered by 4.75Vas its minimum supply voltage.Operating temperatures should be higher than 0°C.A temperature lower than 70°Cis recommended for operation.It consists of 20 logic blocks (LABs).Its clock frequency should not exceed 144.9MHz.This kind of FPGA is composed of EE PLD.
EPM9320ALC84-10 Features
PLCC package
60 I/Os
84 pin count
84 pins
20 logic blocks (LABs)
EPM9320ALC84-10 Applications
There are a lot of Altera EPM9320ALC84-10 CPLDs applications.
- Handheld digital devices
- Pattern recognition
- White goods (Washing, Cold, Aircon ,...)
- Dedicated input registers
- SUPERVISORY FUNCTION (LVD AND WATCHDOG)
- D/T registers and latches
- Field programmable gate
- Programmable polarity
- I/O expansion
- Battery operated portable devices