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  • LC4384V-5FN256C

LC4384V-5FN256C

1mm PMIC 256 Pin 227.27MHz 3.3V FBGA


  • Manufacturer: Lattice Semiconductor
  • Origchip NO: 477-LC4384V-5FN256C
  • Package: FBGA
  • Datasheet: -
  • Stock: 268
  • Description: 1mm PMIC 256 Pin 227.27MHz 3.3V FBGA (Kg)

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Details

Tags

Parameters
Mount Surface Mount
Package / Case FBGA
Number of Pins 256
JESD-609 Code e1
Moisture Sensitivity Level (MSL) 3
Number of Terminations 256
ECCN Code EAR99
Terminal Finish Tin/Silver/Copper (Sn/Ag/Cu)
Max Operating Temperature 90°C
Min Operating Temperature 0°C
Additional Feature YES
HTS Code 8542.39.00.01
Subcategory Programmable Logic Devices
Technology CMOS
Terminal Position BOTTOM
Terminal Form BALL
Peak Reflow Temperature (Cel) 250
Supply Voltage 3.3V
Terminal Pitch 1mm
Frequency 227.27MHz
Time@Peak Reflow Temperature-Max (s) 40
Pin Count 256
Operating Supply Voltage 3.3V
Max Supply Voltage 3.6V
Min Supply Voltage 3V
Operating Supply Current 13.5mA
Number of I/O 192
Nominal Supply Current 13.5mA
Memory Type EEPROM
Propagation Delay 5 ns
Turn On Delay Time 5 ns
Frequency (Max) 322MHz
Organization 4 DEDICATED INPUTS, 192 I/O
Programmable Logic Type EE PLD
Number of Programmable I/O 56
Number of Logic Blocks (LABs) 36
Output Function MACROCELL
Number of Macro Cells 384
JTAG BST YES
Number of Dedicated Inputs 4
In-System Programmable YES
Height Seated (Max) 2.1mm
Length 17mm
Width 17mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

LC4384V-5FN256C Overview


There are 384 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).A FBGA package contains the item.This device has 192 I/O ports programmed into it.The termination of a device is set to [0].The terminal position of this electrical component is BOTTOM.A voltage of 3.3Vprovides power to the device.This part is in the family [0].There are 256pins on the chip.This device is also capable of displaying [0].Optimal efficiency requires a supply voltage of [0].Data is stored using [0].It is mounted by Surface Mount.The device has a pinout of [0].A maximum voltage of 3.6Vis required for operation.Initially, it requires a voltage of 3Vas the minimum supply voltage.Currently, there are 56 Programmable I/Os available.There is 227.27MHz frequency that can be achieved.The operating temperature should be higher than 0°C.Temperatures should not exceed 90°C.It consists of 36 logic blocks (LABs).To detect the status of input signals, there are 4dedicated inputs.It is recommended that the maximal frequency be less than 0.This kind of FPGA is composed of EE PLD.

LC4384V-5FN256C Features


FBGA package
192 I/Os
256 pin count
256 pins
36 logic blocks (LABs)

LC4384V-5FN256C Applications


There are a lot of Lattice Semiconductor LC4384V-5FN256C CPLDs applications.

  • Pattern recognition
  • Address decoders
  • DDC INTERFACE
  • Software-driven hardware configuration
  • State machine control
  • Custom state machines
  • Auxiliary Power Supply Isolated and Non-isolated
  • Digital multiplexers
  • Reset swapping
  • Power Meter SMPS