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M4A5-32/32-10JNI

PMIC ispMACH? 4A Series M4A5-32 44 Pin 44-LCC (J-Lead)

Manufacturer: Lattice Semiconductor Corporation
Origchip NO: 477-M4A5-32/32-10JNI
Package: 44-LCC (J-Lead)
Datasheet: PDF
Stock: 517
Description: PMIC ispMACH? 4A Series M4A5-32 44 Pin 44-LCC (J-Lead) (Kg)

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Details

Tags

Parameters
Mount	Surface Mount
Mounting Type	Surface Mount
Package / Case	44-LCC (J-Lead)
Number of Pins	44
Operating Temperature	-40°C~85°C TA
Packaging	Tube
Published	1998
Series	ispMACH® 4A
Pbfree Code	yes
Part Status	Obsolete
Moisture Sensitivity Level (MSL)	3 (168 Hours)
ECCN Code	EAR99
HTS Code	8542.39.00.01
Base Part Number	M4A5-32
Pin Count	44
Programmable Type	In System Programmable
Max Supply Voltage	5.5V
Min Supply Voltage	4.5V
Memory Type	EEPROM
Propagation Delay	10 ns
Number of Gates	1250
Max Frequency	182MHz
Number of Macro Cells	32
Voltage Supply - Internal	4.5V~5.5V
RoHS Status	RoHS Compliant
Lead Free	Lead Free

M4A5-32/32-10JNI Overview

There are 32 macro cells, which are cells in a mobile phone network that provides radio coverage served by a high-power cell site (tower, antenna or mast).The item is packaged with 44-LCC (J-Lead).Tubeis the packaging method.The operating temperature of the machine is -40°C~85°C TA to ensure its reliability.It is recommended to mount the chip by Surface Mount.It is a type of FPGA belonging to the ispMACH? 4A series.There are 44 pins on the chip.There are related parts in [0].The 1250gates serve as building blocks for digital circuits.It is recommended that data be stored in [0].Surface Mountmounts this electronic component.The pins are [0].A maximum voltage of 5.5Vis required for operation.Initially, it requires a voltage of 4.5Vas the minimum supply voltage.It is recommended that the maximal frequency be lower than 182MHz.

M4A5-32/32-10JNI Features

44-LCC (J-Lead) package
The operating temperature of -40°C~85°C TA
44 pin count
44 pins

M4A5-32/32-10JNI Applications

There are a lot of Lattice Semiconductor Corporation M4A5-32/32-10JNI CPLDs applications.

STANDARD SERIAL INTERFACE UART
I/O expansion
State machine design
Software-driven hardware configuration
D/T registers and latches
Software-Driven Hardware Configuration
ON-CHIP OSCILLATOR CIRCUIT
Complex programmable logic devices
INTERRUPT SYSTEM
PLC analog input modules