All Products

MM74HC174N

2V~6V 31MHz D-Type Flip Flop DUAL 8μA 74HC Series 16-DIP (0.300, 7.62mm)


  • Manufacturer: Rochester Electronics, LLC
  • Origchip NO: 699-MM74HC174N
  • Package: 16-DIP (0.300, 7.62mm)
  • Datasheet: PDF
  • Stock: 410
  • Description: 2V~6V 31MHz D-Type Flip Flop DUAL 8μA 74HC Series 16-DIP (0.300, 7.62mm)(Kg)

Purchase & Inquiry

Transport

Purchase

You may place an order without registering to Utmel.
We strongly suggest you sign in before purchasing as you can track your order in real time.

Means of Payment

For your convenience, we accept multiple payment methods in USD, including PayPal, Credit Card, and wire transfer.

RFQ (Request for Quotations)

It is recommended to request for quotations to get the latest prices and inventories about the part.
Our sales will reply to your request by email within 24 hours.

IMPORTANT NOTICE

1. You'll receive an order information email in your inbox. (Please remember to check the spam folder if you didn't hear from us).
2. Since inventories and prices may fluctuate to some extent, the sales manager is going to reconfirm the order and let you know if there are any updates.

Shipping Cost

Shipping starts at $40, but some countries will exceed $40. For example (South Africa, Brazil, India, Pakistan, Israel, etc.)
The basic freight (for package ≤0.5kg or corresponding volume) depends on the time zone and country.

Shipping Method

Currently, our products are shipped through DHL, FedEx, SF, and UPS.

Delivery Time

Once the goods are shipped, estimated delivery time depends on the shipping methods you chose:

FedEx International, 5-7 business days.

The following are some common countries' logistic time.
transport

Details

Tags

Parameters
Mounting Type Through Hole
Package / Case 16-DIP (0.300, 7.62mm)
Surface Mount NO
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74HC
JESD-609 Code e3
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
Type D-Type
Terminal Finish MATTE TIN
Technology CMOS
Voltage - Supply 2V~6V
Terminal Position DUAL
Peak Reflow Temperature (Cel) NOT APPLICABLE
Supply Voltage 4.5V
Terminal Pitch 2.54mm
Time@Peak Reflow Temperature-Max (s) NOT APPLICABLE
Function Master Reset
Qualification Status Not Qualified
Output Type Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 6V
Supply Voltage-Min (Vsup) 2V
Clock Frequency 31MHz
Family HC/UH
Current - Quiescent (Iq) 8μA
Current - Output High, Low 5.2mA 5.2mA
Output Polarity TRUE
Number of Bits per Element 6
Max Propagation Delay @ V, Max CL 28ns @ 6V, 50pF
Trigger Type Positive Edge
Input Capacitance 5pF
fmax-Min 50 MHz
Height Seated (Max) 5.08mm
RoHS Status ROHS3 Compliant

MM74HC174N Overview


The item is packaged in 16-DIP (0.300, 7.62mm)cases. A package named Tubeincludes it. As configured, the output uses Non-Inverted. Positive Edgeis the trigger it is configured with. Through Holeis positioned in the way of this electronic part. The supply voltage is set to 2V~6V. A temperature of -40°C~85°C TAis considered to be the operating temperature. Logic flip flops of this type are classified as D-Type. JK flip flop is a part of the 74HCseries of FPGAs. A frequency of 31MHzshould be the maximum output frequency. In total, it contains 1 elements. As a result, it consumes 8μA of quiescent current without being affected by external factors. In 16terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. Power is supplied from a voltage of 4.5V volts. This T flip flop has a capacitance of 5pF farads at the input. This D flip flop belongs to the family of HC/UH. The maximal supply voltage (Vsup) reaches 6V. Normally, the supply voltage (Vsup) should be above 2V.

MM74HC174N Features


Tube package
74HC series

MM74HC174N Applications


There are a lot of Rochester Electronics, LLC MM74HC174N Flip Flops applications.

  • Divide a clock signal by 2 or 4
  • ATE
  • Functionally equivalent to the MC10/100EL29
  • Shift Registers
  • Clock pulse
  • Latch-up performance
  • Latch
  • Balanced Propagation Delays
  • Asynchronous counter
  • Frequency division