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  • TC74VHC374FTELM

TC74VHC374FTELM

2V~5.5V 120MHz D-Type Flip Flop 74VHC374 4μA TC74VHC Series 20-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: Toshiba Semiconductor and Storage
  • Origchip NO: 830-TC74VHC374FTELM
  • Package: 20-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 264
  • Description: 2V~5.5V 120MHz D-Type Flip Flop 74VHC374 4μA TC74VHC Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-TSSOP (0.173, 4.40mm Width)
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Published 2014
Series TC74VHC
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Type D-Type
Voltage - Supply 2V~5.5V
Base Part Number 74VHC374
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Clock Frequency 120MHz
Current - Quiescent (Iq) 4μA
Current - Output High, Low 8mA 8mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 10.1ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 4pF

TC74VHC374FTELM Overview


20-TSSOP (0.173, 4.40mm Width)is the packaging method. A package named Tape & Reel (TR)includes it. The output it is configured with uses Tri-State, Non-Inverted. It is configured with the trigger Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. It operates with a supply voltage of 2V~5.5V. It is operating at a temperature of -40°C~85°C TA. The type of this D latch is D-Type. In this case, it is a type of FPGA belonging to the TC74VHC series. A frequency of 120MHzshould be the maximum output frequency. D latch consists of 1 elements. During its operation, it consumes 4μA quiescent energy. The object belongs to the 74VHC374 family. A 4pFfarad input capacitance is provided by this T flip flop.

TC74VHC374FTELM Features


Tape & Reel (TR) package
TC74VHC series

TC74VHC374FTELM Applications


There are a lot of Toshiba Semiconductor and Storage TC74VHC374FTELM Flip Flops applications.

  • Convert a momentary switch to a toggle switch
  • Supports Live Insertion
  • Individual Asynchronous Resets
  • Modulo – n – counter
  • Reduced system switching noise
  • Single Down Count-Control Line
  • Asynchronous counter
  • Divide a clock signal by 2 or 4
  • Data Synchronizers
  • Control circuits