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XCR3256XL-12CS280C

0.8mm PMIC 280 Pin 3.3V

Manufacturer: Xilinx
Origchip NO: 903-XCR3256XL-12CS280C
Package: -
Datasheet: PDF
Stock: 110
Description: 0.8mm PMIC 280 Pin 3.3V (Kg)

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Details

Tags

Parameters
Factory Lead Time	6 Weeks
Surface Mount	YES
Number of Pins	280
Published	2003
JESD-609 Code	e0
Pbfree Code	no
Part Status	Active
Moisture Sensitivity Level (MSL)	3
Number of Terminations	280
ECCN Code	EAR99
Terminal Finish	Tin/Lead (Sn63Pb37)
Max Operating Temperature	70°C
Min Operating Temperature	0°C
Additional Feature	YES
HTS Code	8542.39.00.01
Subcategory	Programmable Logic Devices
Technology	CMOS
Terminal Position	BOTTOM
Terminal Form	BALL
Peak Reflow Temperature (Cel)	240
Supply Voltage	3.3V
Terminal Pitch	0.8mm
Reach Compliance Code	not_compliant
Time@Peak Reflow Temperature-Max (s)	30
Pin Count	280
Qualification Status	Not Qualified
Operating Supply Voltage	3.3V
Supply Voltage-Max (Vsup)	3.6V
Temperature Grade	COMMERCIAL
Number of I/O	164
Memory Type	EEPROM
Propagation Delay	12 ns
Frequency (Max)	88MHz
Programmable Logic Type	EE PLD
Number of Logic Blocks (LABs)	16
Speed Grade	12
Output Function	MACROCELL
Number of Macro Cells	256
JTAG BST	YES
In-System Programmable	YES
Height Seated (Max)	1.2mm
RoHS Status	Non-RoHS Compliant

XCR3256XL-12CS280C Overview

There are 256 macro cells, which provide radio coverage via high-power cell towers, antennas or masts in a mobile phone network.It is equipped with 164I/O ports.It is programmed that device terminations will be 280 .This electrical component has a terminal position of 0.It is powered by a voltage of 3.3V volts.There is a part in the family [0].A chip with 280pins is programmed.The device can also be used to find [0].High efficiency requires the supply voltage to be maintained at [0].In order to store data, EEPROMis used.The device is designed with pins [0].3.6Vrepresents the maximal supply voltage (Vsup).Ideally, the operating temperature should be greater than 0°C.A temperature lower than 70°Cis recommended for operation.Its basic building block is composed of 16 logic blocks (LABs).It is recommended that the maximal frequency be lower than 88MHz.A programmable logic type can be categorized as EE PLD.

XCR3256XL-12CS280C Features

164 I/Os
280 pin count
280 pins
16 logic blocks (LABs)

XCR3256XL-12CS280C Applications

There are a lot of Xilinx XCR3256XL-12CS280C CPLDs applications.

Field programmable gate
Configurable Addressing of I/O Boards
Code converters
I/O expansion
Discrete logic functions
Page register
Synchronous or asynchronous mode
Timing control
Dedicated input registers
Pattern recognition