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5M40ZE64I5N

0.4mm PMIC 64 Pin 1.4749GHz 1.8V QFP


  • Manufacturer: Altera
  • Origchip NO: 2936-5M40ZE64I5N
  • Package: QFP
  • Datasheet: PDF
  • Stock: 751
  • Description: 0.4mm PMIC 64 Pin 1.4749GHz 1.8V QFP (Kg)

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FedEx International, 5-7 business days.

The following are some common countries' logistic time.
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Details

Tags

Parameters
Factory Lead Time 12 Weeks
Mount Surface Mount
Package / Case QFP
Number of Pins 64
Published 2003
JESD-609 Code e3
Pbfree Code yes
Part Status Active
Number of Terminations 64
ECCN Code EAR99
Terminal Finish MATTE TIN
Max Operating Temperature 100°C
Min Operating Temperature -40°C
Terminal Position QUAD
Terminal Form GULL WING
Supply Voltage 1.8V
Terminal Pitch 0.4mm
Frequency 1.4749GHz
Pin Count 64
Operating Supply Voltage 1.8V
Temperature Grade INDUSTRIAL
Max Supply Voltage 1.89V
Min Supply Voltage 1.71V
Memory Size 1kB
Operating Supply Current 25μA
Number of I/O 54
Nominal Supply Current 25μA
Memory Type FLASH
Propagation Delay 14 ns
Frequency (Max) 152MHz
Number of Logic Elements/Cells 40
Number of Programmable I/O 54
Number of Logic Blocks (LABs) 8
Output Function MACROCELL
Number of Macro Cells 32
Height Seated (Max) 1.2mm
Length 7mm
Width 7mm
Radiation Hardening No
RoHS Status RoHS Compliant
Lead Free Lead Free

5M40ZE64I5N Overview


A mobile phone network consists of 32macro cells, which are radio coverage cells served by a high-power cell site (tower, antenna or mast).You can find it in package [0].The device is programmed with 54 I/O ports.It is programmed to terminate devices at [0].As the terminal position of this electrical part is [0], it serves as an important access point for passengers and freight.Power is supplied by a voltage of 1.8V volts.There are 64 pins on the chip.High efficiency requires a voltage supply of [0].Data is stored using [0].This device is mounted by Surface Mount.The 64pins are designed into the board.In this case, the maximum supply voltage is 1.89V.A minimum supply voltage of 1.71V is required for it to operate.A total of 54programmable I/Os are available.This can be achieved at a frequency of 1.4749GHz.The operating temperature should be higher than -40°C.The operating temperature should be lower than 100°C.The logic block consists of 8 l logic blocks (LABs).A fundamental building block of logic consists of 40logic elements/cells.There should be a lower maximum frequency than 152MHz.Devices include a memory of 1kBavailable for the storage of programs and data.

5M40ZE64I5N Features


QFP package
54 I/Os
64 pin count
64 pins
8 logic blocks (LABs)

5M40ZE64I5N Applications


There are a lot of Altera 5M40ZE64I5N CPLDs applications.

  • Programmable polarity
  • Address decoders
  • Handheld digital devices
  • Code converters
  • Preset swapping
  • ToR/Aggregation/Core Switch and Router
  • Complex programmable logic devices
  • I/O PORTS (MCU MODULE)
  • Parity generators
  • Programmable power management