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  • 5M40ZE64I5N

5M40ZE64I5N

0.4mm PMIC MAX? V Series 5M40Z 1.8V 64-TQFP Exposed Pad


  • Manufacturer: Intel
  • Origchip NO: 386-5M40ZE64I5N
  • Package: 64-TQFP Exposed Pad
  • Datasheet: PDF
  • Stock: 852
  • Description: 0.4mm PMIC MAX? V Series 5M40Z 1.8V 64-TQFP Exposed Pad (Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Mounting Type Surface Mount
Package / Case 64-TQFP Exposed Pad
Surface Mount YES
Operating Temperature -40°C~100°C TJ
Packaging Tray
Series MAX® V
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Number of Terminations 64
ECCN Code EAR99
Terminal Finish Matte Tin (Sn)
Terminal Position QUAD
Terminal Form GULL WING
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 1.8V
Terminal Pitch 0.4mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 5M40Z
JESD-30 Code S-PQFP-G64
Qualification Status Not Qualified
Supply Voltage-Max (Vsup) 1.89V
Supply Voltage-Min (Vsup) 1.71V
Programmable Type In System Programmable
Number of I/O 54
Clock Frequency 118.3MHz
Propagation Delay 14 ns
Output Function MACROCELL
Number of Macro Cells 32
Voltage Supply - Internal 1.71V~1.89V
Delay Time tpd(1) Max 7.5ns
Number of Logic Elements/Blocks 40
Height Seated (Max) 1.2mm
Length 7mm
Width 7mm
RoHS Status RoHS Compliant

5M40ZE64I5N Overview


There are 32 macro cells. A macro cell is a cell in a mobile phone network that provides radio coverage through the use of a high-power cell site (tower, antenna or mast).It is contained in package [0].There are 54 I/Os programmed in it.The device is programmed with 64 terminations.Its terminal position is QUAD.Power is provided by a supply voltage of 1.8V volts.Trayshould be used to package the chip.A reliable operation is ensured by the operating temperature of [0].It is recommended to mount the chip by Surface Mount.The MAX? Vseries comprises this type of FPGA.The 5M40Zindicates that its related parts can be found.In total, there are 40 logic elements/blocks.The maximal supply voltage (Vsup) reaches 1.89V.The supply voltage (Vsup) should be greater than 1.71V.It should not exceed 118.3MHzin terms of clockfrequency.

5M40ZE64I5N Features


64-TQFP Exposed Pad package
54 I/Os
The operating temperature of -40°C~100°C TJ

5M40ZE64I5N Applications


There are a lot of Intel 5M40ZE64I5N CPLDs applications.

  • Address decoding
  • Code converters
  • ANALOG-TO-DIGITAL CONVERTOR (ADC)
  • DMA control
  • Complex programmable logic devices
  • TIMERS/COUNTERS
  • Pattern recognition
  • Bootloaders for FPGAs
  • Wireless Infrastructure Base Band Unit and Remote Radio Unit
  • Multiple Clock Source Selection