74ACT109SC

74ACT109SC Overview

The flip flop is packaged in a case of 16-SOIC (0.154, 3.90mm Width). A package named Tubeincludes it. Differentialis the output configured for it. The trigger configured with it uses Positive Edge. It is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 4.5V~5.5V volts. -40°C~85°C TAis the operating temperature. JK Typeis the type of this D latch. This type of FPGA is a part of the 74ACT series. A frequency of 210MHzshould be the maximum output frequency. The element count is 2 . As a result, it consumes 20μA quiescent current and is not affected by external forces. D latch belongs to the 74ACT109 family. JK flip flop input capacitance is 4.5pF farads. In this case, the electronic component is mounted in the way of Surface Mount. The 16pins are designed into the board. There is a clock edge trigger type of Positive Edgeon this device. This flip flop is designed with 2 Bits. The superior flexibility of this product is achieved by using 2 circuits. If high efficiency is desired, the supply voltage should be kept at 5V. With an output current of 24mA, it is possible to design the device in any way you want. There are 2 output lines in this JK flip flop. Currently, there are 5 input lines present. In this case, the high level output current is set to -24mA. There is 24mA output current at the low level. Ideally, the operating temperature should be lower than 85°C. Temperatures above -40°Cshould be used. The system operates with a minimum supply voltage of 4.5V. 5.5Vis the maximum supply voltage it supports. This frequency can be achieved at 210MHz.

74ACT109SC Features

Tube package
74ACT series
16 pins
2 Bits

74ACT109SC Applications

There are a lot of ON Semiconductor 74ACT109SC Flip Flops applications.

• Single Down Count-Control Line
• QML qualified product
• Divide a clock signal by 2 or 4
• ATE
• Reduced system switching noise
• ESD performance
• Supports Live Insertion
• Event Detectors
• Individual Asynchronous Resets
• Latch