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74ACT534SJ

4.5V~5.5V 100MHz D-Type Flip Flop DUAL 40μA 74ACT Series 20-SOIC (0.209, 5.30mm Width)


  • Manufacturer: Rochester Electronics, LLC
  • Origchip NO: 699-74ACT534SJ
  • Package: 20-SOIC (0.209, 5.30mm Width)
  • Datasheet: PDF
  • Stock: 580
  • Description: 4.5V~5.5V 100MHz D-Type Flip Flop DUAL 40μA 74ACT Series 20-SOIC (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-SOIC (0.209, 5.30mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74ACT
JESD-609 Code e3
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish MATTE TIN
Technology CMOS
Voltage - Supply 4.5V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Reach Compliance Code unknown
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
JESD-30 Code R-PDSO-G20
Function Standard
Qualification Status COMMERCIAL
Output Type Tri-State, Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Supply Voltage-Min (Vsup) 4.5V
Number of Ports 2
Clock Frequency 100MHz
Family ACT
Current - Quiescent (Iq) 40μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 11.5ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 4.5pF
Width 5.3mm
RoHS Status ROHS3 Compliant

74ACT534SJ Overview


It is embeded in 20-SOIC (0.209, 5.30mm Width) case. A package named Tubeincludes it. There is a Tri-State, Invertedoutput configured with it. There is a trigger configured with Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates with an input voltage of 4.5V~5.5V volts. A temperature of -40°C~85°C TAis considered to be the operating temperature. This D latch has the type D-Type. It belongs to the 74ACTseries of FPGAs. In order for it to function properly, its output frequency should not exceed 100MHz. In total, it contains 1 elements. T flip flop consumes 40μA quiescent energy. The number of terminations is 20. It is powered from a supply voltage of 5V. A 4.5pFfarad input capacitance is provided by this T flip flop. A device of this type belongs to the family of ACT. As soon as Vsup reaches 5.5V, the maximum supply voltage is reached. Keeping the supply voltage (Vsup) above 4.5V is necessary for normal operation. A total of 2ports are embedded in the D flip flop.

74ACT534SJ Features


Tube package
74ACT series

74ACT534SJ Applications


There are a lot of Rochester Electronics, LLC 74ACT534SJ Flip Flops applications.

  • QML qualified product
  • Safety Clamp
  • Frequency division
  • Modulo – n – counter
  • EMI reduction circuitry
  • Latch-up performance
  • Reduced system switching noise
  • Storage registers
  • Count Modes
  • ESD protection