74ACTQ18823MTD

74ACTQ18823MTD Overview

56-TFSOP (0.240, 6.10mm Width)is the way it is packaged. The Tubepackage contains it. There is a Tri-State, Non-Invertedoutput configured with it. The trigger configured with it uses Positive Edge. The electronic part is mounted in the way of Surface Mount. With a supply voltage of 4.5V~5.5V volts, it operates. A temperature of -40°C~85°C TAis considered to be the operating temperature. This D latch has the type D-Type. JK flip flop belongs to the 74ACTQseries of FPGAs. A frequency of 100MHzshould not be exceeded by its output. The element count is 2 . There is 80μA quiescent consumption. There are 56 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. The D flip flop is powered by a voltage of 5V . A JK flip flop with a 4.5pFfarad input capacitance is used here. A device of this type belongs to the family of ACT. 5.5Vis the maximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be above 4.5V. There are 2 ports embedded in the flip flops. Additionally, it is characterized by WITH CLEAR AND CLOCK ENABLE.

74ACTQ18823MTD Features

Tube package
74ACTQ series

74ACTQ18823MTD Applications

There are a lot of Rochester Electronics, LLC 74ACTQ18823MTD Flip Flops applications.

• Cold spare funcion
• High Performance Logic for test systems
• Latch-up performance
• Storage Registers
• Circuit Design
• Functionally equivalent to the MC10/100EL29
• Common Clocks
• ESD protection
• Storage registers
• Digital electronics systems