74ACTQ273SCX

74ACTQ273SCX Overview

In the form of 20-SOIC (0.295, 7.50mm Width), it has been packaged. There is an embedded version in the package Tape & Reel (TR). As configured, the output uses Non-Inverted. JK flip flop uses Positive Edgeas the trigger. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates at a voltage of 4.5V~5.5V. It is operating at -40°C~85°C TA. This electronic flip flop is of type D-Type. In FPGA terms, D flip flop is a type of 74ACTQseries FPGA. It should not exceed 189MHzin its output frequency. In total, it contains 1 elements. T flip flop consumes 40μA quiescent energy. If you search by 74ACTQ273, you will find similar parts. JK flip flop input capacitance is 4.5pF farads. There is an electronic part that is mounted in the way of Surface Mount. With its 20pins, it is designed to work with most electronic flip flops. The clock edge trigger type for this device is Positive Edge. An electronic part designed with 8bits is used in this application. The superior flexibility of this circuit is achieved by using 8 circuits. High efficiency requires the supply voltage to be maintained at 5V. It operates with 8 output lines. As of now, there are 8input lines. A -24mAvalue is set for the high level output current. In the low level output current setting, the current is set to 24mA. It is recommended that the operating temperature be lower than 85°C. Temperatures above -40°Cshould be used. Initially, it requires a voltage of 4.5V as the minimum supply voltage. There is a maximum voltage support of 5.5V. It is possible to obtain a frequency of 110MHz.

74ACTQ273SCX Features

Tape & Reel (TR) package
74ACTQ series
20 pins
8 Bits

74ACTQ273SCX Applications

There are a lot of ON Semiconductor 74ACTQ273SCX Flip Flops applications.

• Data storage
• Matched Rise and Fall
• ESD performance
• Set-reset capability
• Balanced Propagation Delays
• EMI reduction circuitry
• Buffered Clock
• Single Down Count-Control Line
• Test & Measurement
• Common Clocks