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  • 74ALVC16374GX

74ALVC16374GX

1.65V~3.6V 250MHz D-Type Flip Flop 74ALVC16374 40μA 74ALVC Series 54-LFBGA


  • Manufacturer: ON Semiconductor
  • Origchip NO: 598-74ALVC16374GX
  • Package: 54-LFBGA
  • Datasheet: PDF
  • Stock: 510
  • Description: 1.65V~3.6V 250MHz D-Type Flip Flop 74ALVC16374 40μA 74ALVC Series 54-LFBGA(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 54-LFBGA
Supplier Device Package 54-FBGA (5.5x8)
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74ALVC
Part Status Obsolete
Moisture Sensitivity Level (MSL) 3 (168 Hours)
Type D-Type
Voltage - Supply 1.65V~3.6V
Base Part Number 74ALVC16374
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 2
Clock Frequency 250MHz
Current - Quiescent (Iq) 40μA
Current - Output High, Low 24mA 24mA
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 3.5ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 6pF

74ALVC16374GX Overview


In the form of 54-LFBGA, it has been packaged. You can find it in the Tape & Reel (TR)package. T flip flop is configured with an output of Tri-State, Non-Inverted. It is configured with a trigger that uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The supply voltage is set to 1.65V~3.6V. -40°C~85°C TAis the operating temperature. A flip flop of this type is classified as a D-Type. The FPGA belongs to the 74ALVC series. In order for it to function properly, its output frequency should not exceed 250MHz. There are 2 elements in it. It consumes 40μA of quiescent current without being affected by external factors. This D latch belongs to the family of 74ALVC16374. Input capacitance of this device is 6pF farads.

74ALVC16374GX Features


Tape & Reel (TR) package
74ALVC series

74ALVC16374GX Applications


There are a lot of ON Semiconductor 74ALVC16374GX Flip Flops applications.

  • Balanced Propagation Delays
  • Individual Asynchronous Resets
  • Power down protection
  • Single Down Count-Control Line
  • Communications
  • ESD performance
  • CMOS Process
  • Divide a clock signal by 2 or 4
  • Computing
  • Buffer registers