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  • 74ALVC374BQ,115

74ALVC374BQ,115

1.65V~3.6V 300MHz 8 Bit D-Type Flip Flop QUAD 74ALVC374 20 Pins 10μA 74ALVC Series 20-VFQFN Exposed Pad


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74ALVC374BQ,115
  • Package: 20-VFQFN Exposed Pad
  • Datasheet: PDF
  • Stock: 646
  • Description: 1.65V~3.6V 300MHz 8 Bit D-Type Flip Flop QUAD 74ALVC374 20 Pins 10μA 74ALVC Series 20-VFQFN Exposed Pad(Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Contact Plating Gold
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 20-VFQFN Exposed Pad
Number of Pins 20
Operating Temperature -40°C~85°C TA
Packaging Tape & Reel (TR)
Series 74ALVC
JESD-609 Code e4
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position QUAD
Peak Reflow Temperature (Cel) 260
Supply Voltage 2.7V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74ALVC374
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Max (Vsup) 3.6V
Number of Ports 2
Number of Bits 8
Clock Frequency 300MHz
Propagation Delay 7 ns
Turn On Delay Time 3.1 ns
Family ALVC/VCX/A
Current - Quiescent (Iq) 10μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Max Propagation Delay @ V, Max CL 3.6ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 3.5pF
Number of Input Lines 8
Clock Edge Trigger Type Positive Edge
Length 4.5mm
Width 2.5mm
Radiation Hardening No
RoHS Status ROHS3 Compliant

74ALVC374BQ,115 Overview


20-VFQFN Exposed Padis the packaging method. Package Tape & Reel (TR)embeds it. There is a Tri-State, Non-Invertedoutput configured with it. In the configuration of the trigger, Positive Edgeis used. Surface Mountmounts this electrical part. A voltage of 1.65V~3.6Vis required for its operation. It is at -40°C~85°C TAdegrees Celsius that the system is operating. D-Typedescribes this flip flop. In FPGA terms, D flip flop is a type of 74ALVCseries FPGA. In order for it to function properly, its output frequency should not exceed 300MHz. D latch consists of 1 elements. It consumes 10μA of quiescent A total of 20 terminations have been made. The object belongs to the 74ALVC374 family. Power is supplied from a voltage of 2.7V volts. The input capacitance of this T flip flop is 3.5pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. The electronic device belongs to the ALVC/VCX/Afamily. Electronic part Surface Mountis mounted in the way. 20pins are included in its design. A Positive Edgeclock edge trigger is used in this device. It is designed with 8bits. It reaches 3.6Vwhen the maximum supply voltage (Vsup) is applied. A total of 2ports are embedded in the D flip flop. It has 8lines.

74ALVC374BQ,115 Features


Tape & Reel (TR) package
74ALVC series
20 pins
8 Bits

74ALVC374BQ,115 Applications


There are a lot of Nexperia USA Inc. 74ALVC374BQ,115 Flip Flops applications.

  • Shift Registers
  • Computers
  • 2 – Bit synchronous counter
  • Communications
  • Memory
  • Functionally equivalent to the MC10/100EL29
  • Convert a momentary switch to a toggle switch
  • CMOS Process
  • Registers
  • Automotive