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  • 74ALVCH16374DGG,51

74ALVCH16374DGG,51

1.2V~3.6V 350MHz D-Type Flip Flop DUAL 74ALVCH16374 40μA 74ALVCH Series 48-TFSOP (0.240, 6.10mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74ALVCH16374DGG,51
  • Package: 48-TFSOP (0.240, 6.10mm Width)
  • Datasheet: PDF
  • Stock: 222
  • Description: 1.2V~3.6V 350MHz D-Type Flip Flop DUAL 74ALVCH16374 40μA 74ALVCH Series 48-TFSOP (0.240, 6.10mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 48-TFSOP (0.240, 6.10mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74ALVCH
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 48
Type D-Type
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Subcategory FF/Latches
Packing Method TAPE AND REEL
Technology CMOS
Voltage - Supply 1.2V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.5mm
Reach Compliance Code compliant
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74ALVCH16374
Function Standard
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 2
Supply Voltage-Max (Vsup) 3.6V
Power Supplies 3.3V
Load Capacitance 50pF
Number of Ports 2
Clock Frequency 350MHz
Family ALVC/VCX/A
Current - Quiescent (Iq) 40μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 3.4ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 3.4 ns
Trigger Type Positive Edge
Input Capacitance 5pF
Propagation Delay (tpd) 6.5 ns
Width 6.1mm

74ALVCH16374DGG,51 Overview


The flip flop is packaged in 48-TFSOP (0.240, 6.10mm Width). You can find it in the Tubepackage. It is configured with Tri-State, Non-Invertedas an output. It is configured with the trigger Positive Edge. There is an electrical part that is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 1.2V~3.6V volts. It is operating at -40°C~85°C TA. It belongs to the type D-Typeof flip flops. JK flip flop is a part of the 74ALVCHseries of FPGAs. It should not exceed 350MHzin its output frequency. D latch consists of 2 elements. There is a consumption of 40μAof quiescent energy. Terminations are 48. D latch belongs to the 74ALVCH16374 family. The power supply voltage is 3.3V. A JK flip flop with a 5pFfarad input capacitance is used here. It is a member of the ALVC/VCX/Afamily of D flip flop. There is a base part number FF/Latchesfor the RS flip flops. It reaches the maximum supply voltage (Vsup) at 3.6V. In light of its reliable performance, this T flip flop is well suited for TAPE AND REEL. The system runs on a power supply of 3.3V watts. A D flip flop with 2embedded ports is available.

74ALVCH16374DGG,51 Features


Tube package
74ALVCH series
3.3V power supplies

74ALVCH16374DGG,51 Applications


There are a lot of Nexperia USA Inc. 74ALVCH16374DGG,51 Flip Flops applications.

  • Buffered Clock
  • Circuit Design
  • Data Synchronizers
  • Registers
  • Computing
  • Common Clocks
  • Control circuits
  • Count Modes
  • Communications
  • Convert a momentary switch to a toggle switch