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74ALVCH16374T

1.65V~3.6V 150MHz D-Type Flip Flop DUAL 40μA 74ALVCH Series 48-TFSOP (0.240, 6.10mm Width)


  • Manufacturer: Rochester Electronics, LLC
  • Origchip NO: 699-74ALVCH16374T
  • Package: 48-TFSOP (0.240, 6.10mm Width)
  • Datasheet: PDF
  • Stock: 529
  • Description: 1.65V~3.6V 150MHz D-Type Flip Flop DUAL 40μA 74ALVCH Series 48-TFSOP (0.240, 6.10mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 48-TFSOP (0.240, 6.10mm Width)
Surface Mount YES
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74ALVCH
JESD-609 Code e3/e4
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 2 (1 Year)
Number of Terminations 48
Type D-Type
Terminal Finish MATTE TIN/NICKEL PALLADIUM GOLD
Technology CMOS
Voltage - Supply 1.65V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.8V
Terminal Pitch 0.5mm
Reach Compliance Code unknown
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Function Standard
Qualification Status COMMERCIAL
Output Type Tri-State, Non-Inverted
Number of Elements 2
Supply Voltage-Max (Vsup) 3.6V
Supply Voltage-Min (Vsup) 1.65V
Number of Ports 2
Clock Frequency 150MHz
Family ALVC/VCX/A
Current - Quiescent (Iq) 40μA
Output Characteristics 3-STATE
Current - Output High, Low 24mA 24mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 4.2ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 6pF
Width 6.1mm
RoHS Status ROHS3 Compliant

74ALVCH16374T Overview


48-TFSOP (0.240, 6.10mm Width)is the way it is packaged. D flip flop is included in the Tubepackage. There is a Tri-State, Non-Invertedoutput configured with it. This trigger uses the value Positive Edge. Surface Mountis occupied by this electronic component. The supply voltage is set to 1.65V~3.6V. In the operating environment, the temperature is -40°C~85°C TA. There is D-Type type of electronic flip flop associated with this device. FPGAs belonging to the 74ALVCHseries contain this type of chip. This D flip flop should not have a frequency greater than 150MHz. D latch consists of 2 elements. Despite external influences, it consumes 40μAof quiescent current. Currently, there are 48 terminations. An input voltage of 1.8Vpowers the D latch. A 6pFfarad input capacitance is provided by this T flip flop. ALVC/VCX/Ais the family of this D flip flop. As soon as Vsup reaches 3.6V, the maximum supply voltage is reached. Normal operation requires a supply voltage (Vsup) above 1.65V. The flip flop has 2embedded ports.

74ALVCH16374T Features


Tube package
74ALVCH series

74ALVCH16374T Applications


There are a lot of Rochester Electronics, LLC 74ALVCH16374T Flip Flops applications.

  • Bus hold
  • Pattern generators
  • Clock pulse
  • Reduced system switching noise
  • Registers
  • Data Synchronizers
  • 2 – Bit synchronous counter
  • Power down protection
  • Digital electronics systems
  • Memory