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  • 74ALVT162821DGGS

74ALVT162821DGGS

2.3V~2.7V 3V~3.6V 150MHz D-Type Flip Flop DUAL 74ALVT Series 56-TFSOP (0.240, 6.10mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74ALVT162821DGGS
  • Package: 56-TFSOP (0.240, 6.10mm Width)
  • Datasheet: PDF
  • Stock: 741
  • Description: 2.3V~2.7V 3V~3.6V 150MHz D-Type Flip Flop DUAL 74ALVT Series 56-TFSOP (0.240, 6.10mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 56-TFSOP (0.240, 6.10mm Width)
Operating Temperature -40°C~85°C TA
Packaging Tube
Published 1998
Series 74ALVT
JESD-609 Code e4
Part Status Active
Moisture Sensitivity Level (MSL) 2 (1 Year)
Number of Terminations 56
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Technology BICMOS
Voltage - Supply 2.3V~2.7V 3V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Supply Voltage 2.5V
Terminal Pitch 0.5mm
JESD-30 Code R-PDSO-G56
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 2
Number of Ports 2
Clock Frequency 150MHz
Propagation Delay 5 ns
Output Characteristics 3-STATE WITH SERIES RESISTOR
Current - Output High, Low 8mA 12mA; 12mA 12mA
Output Polarity TRUE
Number of Bits per Element 10
Max Propagation Delay @ V, Max CL 5ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 3pF
Clock Edge Trigger Type Positive Edge
Length 14mm
Width 6.1mm
RoHS Status ROHS3 Compliant

74ALVT162821DGGS Overview


56-TFSOP (0.240, 6.10mm Width)is the way it is packaged. You can find it in the Tubepackage. There is a Tri-State, Non-Invertedoutput configured with it. The trigger it is configured with uses Positive Edge. Surface Mountmounts this electrical part. A supply voltage of 2.3V~2.7V 3V~3.6V is required for operation. In the operating environment, the temperature is -40°C~85°C TA. A flip flop of this type is classified as a D-Type. It is a type of FPGA belonging to the 74ALVT series. This D flip flop should not have a frequency greater than 150MHz. A total of 2 elements are present. There have been 56 terminations. The power source is powered by 2.5V. The input capacitance of this T flip flop is 3pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It is mounted in the way of Surface Mount. Its clock edge trigger type is Positive Edge. The D flip flop is embedded with 2ports.

74ALVT162821DGGS Features


Tube package
74ALVT series

74ALVT162821DGGS Applications


There are a lot of Nexperia USA Inc. 74ALVT162821DGGS Flip Flops applications.

  • Frequency Divider circuits
  • Divide a clock signal by 2 or 4
  • Individual Asynchronous Resets
  • Event Detectors
  • EMI reduction circuitry
  • Balanced Propagation Delays
  • Shift Registers
  • Clock pulse
  • Buffered Clock
  • Bounce elimination switch