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  • 74ALVT16821DGGS

74ALVT16821DGGS

2.3V~2.7V 3V~3.6V 150MHz D-Type Flip Flop DUAL 74ALVT Series 56-TFSOP (0.240, 6.10mm Width)


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74ALVT16821DGGS
  • Package: 56-TFSOP (0.240, 6.10mm Width)
  • Datasheet: PDF
  • Stock: 137
  • Description: 2.3V~2.7V 3V~3.6V 150MHz D-Type Flip Flop DUAL 74ALVT Series 56-TFSOP (0.240, 6.10mm Width)(Kg)

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Details

Tags

Parameters
Factory Lead Time 8 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 56-TFSOP (0.240, 6.10mm Width)
Operating Temperature -40°C~85°C TA
Packaging Tube
Series 74ALVT
JESD-609 Code e4
Part Status Active
Moisture Sensitivity Level (MSL) 2 (1 Year)
Number of Terminations 56
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Additional Feature CAN ALSO OPERATE AT 3.3V VCC
Technology BICMOS
Voltage - Supply 2.3V~2.7V 3V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Supply Voltage 2.5V
Terminal Pitch 0.5mm
JESD-30 Code R-PDSO-G56
Function Standard
Output Type Tri-State, Non-Inverted
Number of Elements 2
Number of Ports 2
Clock Frequency 150MHz
Propagation Delay 3.2 ns
Quiescent Current 70μA
Output Characteristics 3-STATE
Current - Output High, Low 8mA 24mA; 32mA 64mA
Output Polarity TRUE
Number of Bits per Element 10
Max Propagation Delay @ V, Max CL 3.2ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 3pF
Clock Edge Trigger Type Positive Edge
Length 14mm
Width 6.1mm
RoHS Status ROHS3 Compliant

74ALVT16821DGGS Overview


As a result, it is packaged as 56-TFSOP (0.240, 6.10mm Width). As part of the package Tube, it is embedded. Tri-State, Non-Invertedis the output configured for it. There is a trigger configured with Positive Edge. Surface Mountis in the way of this electric part. The JK flip flop operates at a voltage of 2.3V~2.7V 3V~3.6V. A temperature of -40°C~85°C TAis considered to be the operating temperature. This D latch has the type D-Type. This type of FPGA is a part of the 74ALVT series. You should not exceed 150MHzin its output frequency. A total of 2 elements are present. The number of terminations is 56. An input voltage of 2.5Vpowers the D latch. JK flip flop input capacitance is 3pF farads. It is mounted in the way of Surface Mount. It has a clock edge trigger type of Positive Edge. This flip flop has a total of 2ports. It consumes 70μA current. Additionally, there are CAN ALSO OPERATE AT 3.3V VCC on the electronic flip flop that can be referred to.

74ALVT16821DGGS Features


Tube package
74ALVT series

74ALVT16821DGGS Applications


There are a lot of Nexperia USA Inc. 74ALVT16821DGGS Flip Flops applications.

  • Storage registers
  • Buffered Clock
  • Circuit Design
  • Consumer
  • Storage Registers
  • Latch-up performance
  • Clock pulse
  • Automotive
  • Computers
  • Shift Registers