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  • 74AUP1G175GW-Q100H

74AUP1G175GW-Q100H

0.8V~3.6V 300MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G175 6 Pins 500nA 74AUP Series 5-TSSOP, SC-70-5, SOT-353


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74AUP1G175GW-Q100H
  • Package: 5-TSSOP, SC-70-5, SOT-353
  • Datasheet: PDF
  • Stock: 877
  • Description: 0.8V~3.6V 300MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G175 6 Pins 500nA 74AUP Series 5-TSSOP, SC-70-5, SOT-353(Kg)

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Details

Tags

Parameters
Factory Lead Time 4 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 5-TSSOP, SC-70-5, SOT-353
Number of Pins 6
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Series 74AUP
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 6
Type D-Type
Technology CMOS
Voltage - Supply 0.8V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Supply Voltage 1.1V
Base Part Number 74AUP1G175
Function Reset
Output Type Non-Inverted
Number of Elements 1
Polarity Non-Inverting
Supply Voltage-Min (Vsup) 0.8V
Number of Bits 1
Clock Frequency 300MHz
Propagation Delay 21 ns
Family AUP/ULP/V
Current - Quiescent (Iq) 500nA
Current - Output High, Low 4mA 4mA
Max Propagation Delay @ V, Max CL 5.7ns @ 3.3V, 30pF
Trigger Type Positive Edge
Input Capacitance 0.8pF
fmax-Min 550 MHz
Clock Edge Trigger Type Positive Edge
Length 2mm
Radiation Hardening No
RoHS Status ROHS3 Compliant

74AUP1G175GW-Q100H Overview


The package is in the form of 5-TSSOP, SC-70-5, SOT-353. It is included in the package Tape & Reel (TR). In the configuration, Non-Invertedis used as the output. There is a trigger configured with Positive Edge. Surface Mountis positioned in the way of this electronic part. The JK flip flop operates with an input voltage of 0.8V~3.6V volts. It is at -40°C~125°C TAdegrees Celsius that the system is operating. It belongs to the type D-Typeof flip flops. In this case, it is a type of FPGA belonging to the 74AUP series. A frequency of 300MHzshould be the maximum output frequency. D latch consists of 1 elements. There is a consumption of 500nAof quiescent energy. There have been 6 terminations. Members of the 74AUP1G175family make up this object. An input voltage of 1.1Vpowers the D latch. Input capacitance of this device is 0.8pF farads. It is a member of the AUP/ULP/Vfamily of D flip flop. The electronic part is mounted in the way of Surface Mount. This board has 6 pins. It has a clock edge trigger type of Positive Edge. The flip flop is designed with 1bits. The supply voltage (Vsup) should be maintained above 0.8V for normal operation.

74AUP1G175GW-Q100H Features


Tape & Reel (TR) package
74AUP series
6 pins
1 Bits

74AUP1G175GW-Q100H Applications


There are a lot of Nexperia USA Inc. 74AUP1G175GW-Q100H Flip Flops applications.

  • EMI reduction circuitry
  • Shift registers
  • ESD protection
  • Buffered Clock
  • Storage Registers
  • High Performance Logic for test systems
  • Bus hold
  • Functionally equivalent to the MC10/100EL29
  • Test & Measurement
  • Common Clocks