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  • 74AUP1G79GX,125

74AUP1G79GX,125

0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G79 5 Pins 74AUP Series 4-XFDFN Exposed Pad


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74AUP1G79GX,125
  • Package: 4-XFDFN Exposed Pad
  • Datasheet: PDF
  • Stock: 752
  • Description: 0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop DUAL 74AUP1G79 5 Pins 74AUP Series 4-XFDFN Exposed Pad(Kg)

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Details

Tags

Parameters
Factory Lead Time 13 Weeks
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 4-XFDFN Exposed Pad
Number of Pins 5
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Series 74AUP
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 5
Type D-Type
Terminal Finish Tin (Sn)
Technology CMOS
Voltage - Supply 0.8V~3.6V
Terminal Position DUAL
Terminal Form NO LEAD
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 1.1V
Terminal Pitch 0.48mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74AUP1G79
Function Standard
Output Type Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 3.6V
Supply Voltage-Min (Vsup) 0.8V
Number of Bits 1
Clock Frequency 309MHz
Propagation Delay 5.8 ns
Quiescent Current 500nA
Family AUP/ULP/V
Current - Output High, Low 4mA 4mA
Output Polarity TRUE
Max Propagation Delay @ V, Max CL 5.8ns @ 3.3V, 30pF
Trigger Type Positive Edge
Input Capacitance 0.8pF
Clock Edge Trigger Type Positive Edge
Length 0.8mm
Width 0.8mm
RoHS Status ROHS3 Compliant

74AUP1G79GX,125 Overview


4-XFDFN Exposed Padis the way it is packaged. You can find it in the Tape & Reel (TR)package. This output is configured with Non-Inverted. JK flip flop uses Positive Edgeas the trigger. The electronic part is mounted in the way of Surface Mount. With a supply voltage of 0.8V~3.6V volts, it operates. The operating temperature is -40°C~125°C TA. Logic flip flops of this type are classified as D-Type. JK flip flop is a part of the 74AUPseries of FPGAs. Its output frequency should not exceed 309MHz Hz. In total, there are 1 elements. Currently, there are 5 terminations. D latch belongs to the 74AUP1G79 family. Power is supplied from a voltage of 1.1V volts. A JK flip flop with a 0.8pFfarad input capacitance is used here. It belongs to the family of electronic devices known as AUP/ULP/V. In this case, the electronic component is mounted in the way of Surface Mount. The electronic flip flop is designed with pins 5. In this device, the clock edge trigger type is Positive Edge. An electronic part designed with 1bits is used in this application. The maximal supply voltage (Vsup) reaches 3.6V. The supply voltage (Vsup) should be kept above 0.8V for normal operation. Quiescent current is consumed by the D latch in the amount of 500nA.

74AUP1G79GX,125 Features


Tape & Reel (TR) package
74AUP series
5 pins
1 Bits

74AUP1G79GX,125 Applications


There are a lot of Nexperia USA Inc. 74AUP1G79GX,125 Flip Flops applications.

  • Bounce elimination switch
  • Computing
  • Event Detectors
  • Parallel data storage
  • Count Modes
  • Safety Clamp
  • Data transfer
  • ESCC
  • Circuit Design
  • 2 – Bit synchronous counter