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  • 74AUP1G80GX,125

74AUP1G80GX,125

0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop BOTTOM 74AUP1G80 500nA 74AUP Series 4-XFDFN Exposed Pad


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74AUP1G80GX,125
  • Package: 4-XFDFN Exposed Pad
  • Datasheet: PDF
  • Stock: 562
  • Description: 0.8V~3.6V 309MHz 1 Bit D-Type Flip Flop BOTTOM 74AUP1G80 500nA 74AUP Series 4-XFDFN Exposed Pad(Kg)

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Details

Tags

Parameters
Factory Lead Time 13 Weeks
Mounting Type Surface Mount
Package / Case 4-XFDFN Exposed Pad
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Series 74AUP
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 5
Type D-Type
Technology CMOS
Voltage - Supply 0.8V~3.6V
Terminal Position BOTTOM
Terminal Form BUTT
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 1.1V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74AUP1G80
JESD-30 Code S-PBCC-B5
Function Standard
Output Type Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 3.6V
Supply Voltage-Min (Vsup) 0.8V
Number of Bits 1
Clock Frequency 309MHz
Family AUP/ULP/V
Current - Quiescent (Iq) 500nA
Current - Output High, Low 4mA 4mA
Max Propagation Delay @ V, Max CL 6.4ns @ 3.3V, 30pF
Trigger Type Positive Edge
Input Capacitance 1.5pF
Propagation Delay (tpd) 27.2 ns
Height Seated (Max) 0.35mm
Length 0.8mm
Width 0.8mm
RoHS Status ROHS3 Compliant

74AUP1G80GX,125 Overview


In the form of 4-XFDFN Exposed Pad, it has been packaged. D flip flop is embedded in the Tape & Reel (TR) package. Currently, the output is configured to use Inverted. JK flip flop uses Positive Edgeas the trigger. In this case, the electronic component is mounted in the way of Surface Mount. Powered by a 0.8V~3.6Vvolt supply, it operates as follows. -40°C~125°C TAis the operating temperature. There is D-Type type of electronic flip flop associated with this device. In FPGA terms, D flip flop is a type of 74AUPseries FPGA. Its output frequency should not exceed 309MHz Hz. In total, it contains 1 elements. There is a consumption of 500nAof quiescent energy. 5terminations have occurred. The 74AUP1G80 family contains this object. A voltage of 1.1V is used as the power supply for this D latch. This T flip flop has a capacitance of 1.5pF farads at the input. Devices in the AUP/ULP/Vfamily are electronic devices. An electronic part designed with 1bits is used in this application. 3.6Vis the maximum supply voltage (Vsup). If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 0.8V.

74AUP1G80GX,125 Features


Tape & Reel (TR) package
74AUP series
1 Bits

74AUP1G80GX,125 Applications


There are a lot of Nexperia USA Inc. 74AUP1G80GX,125 Flip Flops applications.

  • Frequency Dividers
  • Load Control
  • Single Down Count-Control Line
  • Latch
  • ESCC
  • Synchronous counter
  • High Performance Logic for test systems
  • Common Clocks
  • Data transfer
  • Pattern generators