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  • 74AUP2G79GT,115

74AUP2G79GT,115

0.8V~3.6V 309MHz D-Type Flip Flop DUAL 74AUP2G79 500nA 74AUP Series 8-XFDFN


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74AUP2G79GT,115
  • Package: 8-XFDFN
  • Datasheet: PDF
  • Stock: 429
  • Description: 0.8V~3.6V 309MHz D-Type Flip Flop DUAL 74AUP2G79 500nA 74AUP Series 8-XFDFN(Kg)

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Details

Tags

Parameters
Factory Lead Time 13 Weeks
Mounting Type Surface Mount
Package / Case 8-XFDFN
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2010
Series 74AUP
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8
Type D-Type
Terminal Finish Tin (Sn)
Technology CMOS
Voltage - Supply 0.8V~3.6V
Terminal Position DUAL
Terminal Form NO LEAD
Peak Reflow Temperature (Cel) 260
Supply Voltage 1.2V
Terminal Pitch 0.5mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74AUP2G79
JESD-30 Code R-PDSO-N8
Function Standard
Qualification Status Not Qualified
Output Type Non-Inverted
Number of Elements 2
Supply Voltage-Max (Vsup) 3.6V
Supply Voltage-Min (Vsup) 0.8V
Clock Frequency 309MHz
Family AUP/ULP/V
Current - Quiescent (Iq) 500nA
Current - Output High, Low 4mA 4mA
Output Polarity TRUE
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 5.8ns @ 3.3V, 30pF
Trigger Type Positive Edge
Input Capacitance 0.6pF
Height Seated (Max) 0.5mm
RoHS Status ROHS3 Compliant

74AUP2G79GT,115 Overview


The flip flop is packaged in a case of 8-XFDFN. It is contained within the Tape & Reel (TR)package. As configured, the output uses Non-Inverted. It is configured with a trigger that uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. The JK flip flop operates with an input voltage of 0.8V~3.6V volts. A temperature of -40°C~125°C TAis used in the operation. D-Typeis the type of this D latch. This type of FPGA is a part of the 74AUP series. A frequency of 309MHzshould be the maximum output frequency. In total, it contains 2 elements. Despite external influences, it consumes 500nAof quiescent current. There are 8 terminations, which are the practice of ending a transmission line with a device that matches the characteristic impedance of the line. Members of the 74AUP2G79family make up this object. The power source is powered by 1.2V. The input capacitance of this T flip flop is 0.6pF farads, which is defined as the capacitance between the input terminals of an op amp with either input grounded. It is a member of the AUP/ULP/Vfamily of D flip flop. There is a 3.6Vmaximum supply voltage (Vsup). A normal operating voltage (Vsup) should remain above 0.8V.

74AUP2G79GT,115 Features


Tape & Reel (TR) package
74AUP series

74AUP2G79GT,115 Applications


There are a lot of Nexperia USA Inc. 74AUP2G79GT,115 Flip Flops applications.

  • Load Control
  • Computers
  • Convert a momentary switch to a toggle switch
  • Frequency Dividers
  • Clock pulse
  • Buffered Clock
  • Shift registers
  • Communications
  • ESD performance
  • Dynamic threshold performance