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74AUP2G80GS,115

0.8V~3.6V 309MHz D-Type Flip Flop DUAL 74AUP2G80 8 Pins 74AUP Series 8-XFDFN


  • Manufacturer: Nexperia USA Inc.
  • Origchip NO: 554-74AUP2G80GS,115
  • Package: 8-XFDFN
  • Datasheet: PDF
  • Stock: 243
  • Description: 0.8V~3.6V 309MHz D-Type Flip Flop DUAL 74AUP2G80 8 Pins 74AUP Series 8-XFDFN(Kg)

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Details

Tags

Parameters
Propagation Delay 15.7 ns
Quiescent Current 500nA
Turn On Delay Time 2.2 ns
Family AUP/ULP/V
Current - Output High, Low 4mA 4mA
Number of Bits per Element 1
Max Propagation Delay @ V, Max CL 6.4ns @ 3.3V, 30pF
Trigger Type Positive Edge
Input Capacitance 0.6pF
Clock Edge Trigger Type Positive Edge
Height Seated (Max) 0.35mm
RoHS Status ROHS3 Compliant
Factory Lead Time 13 Weeks
Contact Plating Tin
Mount Surface Mount
Mounting Type Surface Mount
Package / Case 8-XFDFN
Number of Pins 8
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 2010
Series 74AUP
JESD-609 Code e3
Part Status Active
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 8
Type D-Type
Technology CMOS
Voltage - Supply 0.8V~3.6V
Terminal Position DUAL
Terminal Form NO LEAD
Peak Reflow Temperature (Cel) NOT SPECIFIED
Supply Voltage 1.1V
Terminal Pitch 0.35mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Base Part Number 74AUP2G80
Function Standard
Output Type Inverted
Number of Elements 2
Polarity Inverting
Supply Voltage-Max (Vsup) 3.6V
Clock Frequency 309MHz

74AUP2G80GS,115 Overview


The package is in the form of 8-XFDFN. It is included in the package Tape & Reel (TR). It is configured with Invertedas an output. The trigger configured with it uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. A voltage of 0.8V~3.6Vis required for its operation. It is at -40°C~125°C TAdegrees Celsius that the system is operating. The type of this D latch is D-Type. In FPGA terms, D flip flop is a type of 74AUPseries FPGA. A frequency of 309MHzshould not be exceeded by its output. In total, it contains 2 elements. Currently, there are 8 terminations. This D latch belongs to the family of 74AUP2G80. It is powered by a voltage of 1.1V . Its input capacitance is 0.6pF farads. A device of this type belongs to the family of AUP/ULP/V. A part of the electronic system is mounted in the way of Surface Mount. As you can see from the design, it has pins with 8. A Positive Edgeclock edge trigger is used in this device. 3.6Vis the maximum supply voltage (Vsup). There is 500nA quiescent current consumption by it.

74AUP2G80GS,115 Features


Tape & Reel (TR) package
74AUP series
8 pins

74AUP2G80GS,115 Applications


There are a lot of Nexperia USA Inc. 74AUP2G80GS,115 Flip Flops applications.

  • Count Modes
  • Balanced 24 mA output drivers
  • QML qualified product
  • Storage registers
  • Supports Live Insertion
  • Test & Measurement
  • ESD performance
  • ATE
  • Patented noise
  • Safety Clamp