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74F823SC

4.5V~5.5V 160MHz D-Type Flip Flop DUAL 100mA 74F Series 24-SOIC (0.295, 7.50mm Width)


  • Manufacturer: Rochester Electronics, LLC
  • Origchip NO: 699-74F823SC
  • Package: 24-SOIC (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 379
  • Description: 4.5V~5.5V 160MHz D-Type Flip Flop DUAL 100mA 74F Series 24-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Supply Voltage-Max (Vsup) 5.5V
Supply Voltage-Min (Vsup) 4.5V
Number of Ports 2
Clock Frequency 160MHz
Family F/FAST
Current - Quiescent (Iq) 100mA
Output Characteristics 3-STATE
Current - Output High, Low 3mA 24mA
Output Polarity TRUE
Number of Bits per Element 9
Max Propagation Delay @ V, Max CL 9.5ns @ 5V, 50pF
Trigger Type Positive Edge
Height Seated (Max) 2.65mm
Width 7.5mm
RoHS Status ROHS3 Compliant
Mounting Type Surface Mount
Package / Case 24-SOIC (0.295, 7.50mm Width)
Surface Mount YES
Operating Temperature 0°C~70°C TA
Packaging Tube
Series 74F
JESD-609 Code e3
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 24
Type D-Type
Terminal Finish MATTE TIN
Additional Feature WITH CLEAR AND CLOCK ENABLE
Technology TTL
Voltage - Supply 4.5V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 5V
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
JESD-30 Code R-PDSO-G24
Function Master Reset
Qualification Status Not Qualified
Output Type Tri-State, Non-Inverted
Number of Elements 1

74F823SC Overview


It is packaged in the way of 24-SOIC (0.295, 7.50mm Width). D flip flop is embedded in the Tube package. Currently, the output is configured to use Tri-State, Non-Inverted. There is a trigger configured with Positive Edge. Surface Mountis in the way of this electric part. A 4.5V~5.5Vsupply voltage is required for it to operate. The operating temperature is 0°C~70°C TA. This logic flip flop is classified as type D-Type. This type of FPGA is a part of the 74F series. A frequency of 160MHzshould be the maximum output frequency. D latch consists of 1 elements. There is 100mA quiescent consumption. In 24terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. A voltage of 5V is used as the power supply for this D latch. F/FASTis the family of this D flip flop. It reaches 5.5Vwhen the maximum supply voltage (Vsup) is applied. If you want to maintain normal operation, you should keep the supply voltage (Vsup) above 4.5V. This D flip flop is equipped with 0 ports. As an additional reference, you may refer to electronic flip flop WITH CLEAR AND CLOCK ENABLE.

74F823SC Features


Tube package
74F series

74F823SC Applications


There are a lot of Rochester Electronics, LLC 74F823SC Flip Flops applications.

  • Shift registers
  • Clock pulse
  • Computing
  • Patented noise
  • Parallel data storage
  • Control circuits
  • Buffer registers
  • Computers
  • Common Clocks
  • Latch-up performance