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  • 74LV174PW,112

74LV174PW,112

1V~5.5V 100MHz D-Type Flip Flop DUAL 74LV174 160μA 74LV Series 16-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LV174PW,112
  • Package: 16-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 229
  • Description: 1V~5.5V 100MHz D-Type Flip Flop DUAL 74LV174 160μA 74LV Series 16-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 16-TSSOP (0.173, 4.40mm Width)
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tube
Published 1998
Series 74LV
JESD-609 Code e4
Pbfree Code yes
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 16
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 1V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV174
Function Master Reset
Qualification Status Not Qualified
Output Type Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 1V
Load Capacitance 50pF
Clock Frequency 100MHz
Family LV/LV-A/LVX/H
Current - Quiescent (Iq) 160μA
Current - Output High, Low 12mA 12mA
Output Polarity TRUE
Number of Bits per Element 6
Max Propagation Delay @ V, Max CL 21ns @ 5V, 50pF
Trigger Type Positive Edge
Input Capacitance 3.5pF
fmax-Min 20 MHz
Max Frequency@Nom-Sup 20000000Hz
Height Seated (Max) 2mm
Width 5.3mm
RoHS Status ROHS3 Compliant

74LV174PW,112 Overview


16-TSSOP (0.173, 4.40mm Width)is the way it is packaged. You can find it in the Tubepackage. The output it is configured with uses Non-Inverted. The trigger it is configured with uses Positive Edge. The electronic part is mounted in the way of Surface Mount. Powered by a 1V~5.5Vvolt supply, it operates as follows. Currently, the operating temperature is -40°C~125°C TA. This electronic flip flop is of type D-Type. It is a type of FPGA belonging to the 74LV series. In order for it to function properly, its output frequency should not exceed 100MHz. In total, it contains 1 elements. As a result, it consumes 160μA quiescent current. 16terminations have occurred. D latch belongs to the 74LV174 family. The D flip flop is powered by a voltage of 3.3V . A JK flip flop with a 3.5pFfarad input capacitance is used here. It belongs to the family of electronic devices known as LV/LV-A/LVX/H. The RS flip flops belongs to FF/Latches base part number. Vsup reaches its maximum value at 5.5V. Normally, the supply voltage (Vsup) should be kept above 1V. There are 3.3V power supplies attached to it.

74LV174PW,112 Features


Tube package
74LV series
3.3V power supplies

74LV174PW,112 Applications


There are a lot of NXP USA Inc. 74LV174PW,112 Flip Flops applications.

  • Common Clocks
  • Matched Rise and Fall
  • Balanced 24 mA output drivers
  • Frequency Dividers
  • EMI reduction circuitry
  • ESD performance
  • Frequency division
  • Data Synchronizers
  • Power down protection
  • Instrumentation