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  • 74LV273PW,112

74LV273PW,112

1V~5.5V 100MHz D-Type Flip Flop DUAL 74LV273 160μA 74LV Series 20-TSSOP (0.173, 4.40mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LV273PW,112
  • Package: 20-TSSOP (0.173, 4.40mm Width)
  • Datasheet: PDF
  • Stock: 662
  • Description: 1V~5.5V 100MHz D-Type Flip Flop DUAL 74LV273 160μA 74LV Series 20-TSSOP (0.173, 4.40mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-TSSOP (0.173, 4.40mm Width)
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tube
Published 1998
Series 74LV
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 1V~5.5V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV273
JESD-30 Code R-PDSO-G20
Function Master Reset
Qualification Status Not Qualified
Output Type Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 1V
Load Capacitance 50pF
Clock Frequency 100MHz
Family LV/LV-A/LVX/H
Current - Quiescent (Iq) 160μA
Current - Output High, Low 12mA 12mA
Output Polarity TRUE
Max I(ol) 0.006 A
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 19ns @ 5V, 50pF
Prop. Delay@Nom-Sup 24 ns
Trigger Type Positive Edge
Input Capacitance 3.5pF
Propagation Delay (tpd) 24 ns
fmax-Min 20 MHz
Max Frequency@Nom-Sup 20000000Hz
Length 6.5mm
Width 4.4mm
RoHS Status ROHS3 Compliant

74LV273PW,112 Overview


The flip flop is packaged in a case of 20-TSSOP (0.173, 4.40mm Width). It is included in the package Tube. The output it is configured with uses Non-Inverted. Positive Edgeis the trigger it is configured with. There is an electrical part that is mounted in the way of Surface Mount. A voltage of 1V~5.5Vis used as the supply voltage. Currently, the operating temperature is -40°C~125°C TA. D-Typeis the type of this D latch. The FPGA belongs to the 74LV series. It should not exceed 100MHzin its output frequency. A total of 1elements are present in it. This process consumes 160μA quiescents. A total of 20 terminations have been made. The object belongs to the 74LV273 family. The power source is powered by 3.3V. Input capacitance of this device is 3.5pF farads. In this case, the D flip flop belongs to the LV/LV-A/LVX/Hfamily. It is included in FF/Latches. 5.5Vis the maximum supply voltage (Vsup). Normally, the supply voltage (Vsup) should be kept above 1V. The power supply is 3.3V.

74LV273PW,112 Features


Tube package
74LV series
3.3V power supplies

74LV273PW,112 Applications


There are a lot of NXP USA Inc. 74LV273PW,112 Flip Flops applications.

  • Latch-up performance
  • Frequency Dividers
  • Communications
  • Buffered Clock
  • Matched Rise and Fall
  • Computers
  • Individual Asynchronous Resets
  • Data Synchronizers
  • Single Up Count-Control Line
  • Storage registers