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  • 74LV377D,118

74LV377D,118

1V~3.6V 70MHz D-Type Flip Flop DUAL 74LV377 160μA 74LV Series 20-SOIC (0.295, 7.50mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LV377D,118
  • Package: 20-SOIC (0.295, 7.50mm Width)
  • Datasheet: PDF
  • Stock: 349
  • Description: 1V~3.6V 70MHz D-Type Flip Flop DUAL 74LV377 160μA 74LV Series 20-SOIC (0.295, 7.50mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-SOIC (0.295, 7.50mm Width)
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 1998
Series 74LV
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Additional Feature WITH HOLD MODE
Technology CMOS
Voltage - Supply 1V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Reach Compliance Code unknown
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV377
JESD-30 Code R-PDSO-G20
Function Standard
Qualification Status Not Qualified
Output Type Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Supply Voltage-Min (Vsup) 1V
Load Capacitance 50pF
Clock Frequency 70MHz
Family LV/LV-A/LVX/H
Current - Quiescent (Iq) 160μA
Current - Output High, Low 6mA 6mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 30ns @ 3.3V, 50pF
Trigger Type Positive Edge
Input Capacitance 3.5pF
Propagation Delay (tpd) 36 ns
fmax-Min 20 MHz
Height Seated (Max) 2.65mm
Width 7.5mm
RoHS Status ROHS3 Compliant

74LV377D,118 Overview


As a result, it is packaged as 20-SOIC (0.295, 7.50mm Width). It is contained within the Tape & Reel (TR)package. Currently, the output is configured to use Non-Inverted. The trigger configured with it uses Positive Edge. In this case, the electronic component is mounted in the way of Surface Mount. With a supply voltage of 1V~3.6V volts, it operates. It is at -40°C~125°C TAdegrees Celsius that the system is operating. It belongs to the type D-Typeof flip flops. It belongs to the 74LVseries of FPGAs. This D flip flop should not have a frequency greater than 70MHz. D latch consists of 1 elements. As a result, it consumes 160μA of quiescent current without being affected by external factors. The number of terminations is 20. D latch belongs to the 74LV377 family. The power supply voltage is 3.3V. A 3.5pFfarad input capacitance is provided by this T flip flop. It belongs to the family of electronic devices known as LV/LV-A/LVX/H. As soon as 5.5Vis reached, Vsup reaches its maximum value. A normal operating voltage (Vsup) should remain above 1V. Additionally, you may refer to the additional WITH HOLD MODE of the electronic flip flop.

74LV377D,118 Features


Tape & Reel (TR) package
74LV series

74LV377D,118 Applications


There are a lot of NXP USA Inc. 74LV377D,118 Flip Flops applications.

  • Clock pulse
  • Set-reset capability
  • Communications
  • Reduced system switching noise
  • Frequency Divider circuits
  • Modulo – n – counter
  • Bus hold
  • Automotive
  • Shift Registers
  • Digital electronics systems