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  • 74LV377DB,118

74LV377DB,118

1V~3.6V 70MHz D-Type Flip Flop DUAL 74LV377 160μA 74LV Series 20-SSOP (0.209, 5.30mm Width)


  • Manufacturer: NXP USA Inc.
  • Origchip NO: 568-74LV377DB,118
  • Package: 20-SSOP (0.209, 5.30mm Width)
  • Datasheet: PDF
  • Stock: 129
  • Description: 1V~3.6V 70MHz D-Type Flip Flop DUAL 74LV377 160μA 74LV Series 20-SSOP (0.209, 5.30mm Width)(Kg)

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Details

Tags

Parameters
Mounting Type Surface Mount
Package / Case 20-SSOP (0.209, 5.30mm Width)
Surface Mount YES
Operating Temperature -40°C~125°C TA
Packaging Tape & Reel (TR)
Published 1998
Series 74LV
JESD-609 Code e4
Part Status Obsolete
Moisture Sensitivity Level (MSL) 1 (Unlimited)
Number of Terminations 20
Type D-Type
Terminal Finish NICKEL PALLADIUM GOLD
Additional Feature WITH HOLD MODE
Subcategory FF/Latches
Technology CMOS
Voltage - Supply 1V~3.6V
Terminal Position DUAL
Terminal Form GULL WING
Peak Reflow Temperature (Cel) 260
Supply Voltage 3.3V
Terminal Pitch 0.65mm
Time@Peak Reflow Temperature-Max (s) 30
Base Part Number 74LV377
JESD-30 Code R-PDSO-G20
Function Standard
Qualification Status Not Qualified
Output Type Non-Inverted
Number of Elements 1
Supply Voltage-Max (Vsup) 5.5V
Power Supplies 3.3V
Supply Voltage-Min (Vsup) 1V
Load Capacitance 50pF
Clock Frequency 70MHz
Family LV/LV-A/LVX/H
Current - Quiescent (Iq) 160μA
Current - Output High, Low 6mA 6mA
Output Polarity TRUE
Number of Bits per Element 8
Max Propagation Delay @ V, Max CL 30ns @ 3.3V, 50pF
Prop. Delay@Nom-Sup 36 ns
Trigger Type Positive Edge
Input Capacitance 3.5pF
Propagation Delay (tpd) 36 ns
fmax-Min 20 MHz
Max Frequency@Nom-Sup 20000000Hz
Height Seated (Max) 2mm
Length 7.2mm
Width 5.3mm
RoHS Status ROHS3 Compliant

74LV377DB,118 Overview


The item is packaged in 20-SSOP (0.209, 5.30mm Width)cases. You can find it in the Tape & Reel (TR)package. This output is configured with Non-Inverted. There is a trigger configured with Positive Edge. Surface Mountis occupied by this electronic component. A 1V~3.6Vsupply voltage is required for it to operate. In the operating environment, the temperature is -40°C~125°C TA. This electronic flip flop is of type D-Type. It is a type of FPGA belonging to the 74LV series. You should not exceed 70MHzin its output frequency. D latch consists of 1 elements. During its operation, it consumes 160μA quiescent energy. In 20terminations, a transmission line is terminated with a JK flip flop that matches its characteristic impedance. The 74LV377 family contains this object. The power source is powered by 3.3V. There is 3.5pF input capacitance for this T flip flop. A device of this type belongs to the family of LV/LV-A/LVX/H. The RS flip flops belongs to FF/Latches base part number. Vsup reaches 5.5V, the maximal supply voltage. For normal operation, the supply voltage (Vsup) should be kept above 1V. The D latch operates on 3.3V volts. In addition, WITH HOLD MODEis a characteristic of it.

74LV377DB,118 Features


Tape & Reel (TR) package
74LV series
3.3V power supplies

74LV377DB,118 Applications


There are a lot of NXP USA Inc. 74LV377DB,118 Flip Flops applications.

  • Bus hold
  • Data transfer
  • Automotive
  • Data storage
  • Cold spare funcion
  • Circuit Design
  • Latch-up performance
  • Balanced 24 mA output drivers
  • Bounce elimination switch
  • ATE